MXPA01008817A - Identification system. - Google Patents

Abstract

An electronic tag is provided which includes processor means and transmitter circuitry. The processor means, which is typically a micro-controller, is programmed to provide a modulation control signal which includes unique identification data which at least identifies the tag but may include further data. The transmitter circuitry is connected to the processor means and to an antenna for transmission of the unique identification data. The transmitter circuitry is powered by the modulation control signal. Preferably, the transmitter circuitry is exclusively powered by the modulation control signal of the processor means. The invention extends to a receiver for receiving a transmission from the tag and to a system including a plurality of receivers and tags. The invention also extends to a method of communicating data from an electronic tag which includes driving transmitter circuitry of the tag with a modulation control signal which substantially powers the transmitter circuitry.

Description

IDENTIFICATION SYSTEM DESCRIPTION OF THE INVENTION This invention relates to electronic cards.

It also relates to a method for communication of data from an electronic card to an identification system, and with a receiver to receive a transmission from the electronic card. According to the invention, an electronic card is provided which includes -, a processor means programmed to provide modulation control signal which includes unique identification data which at least identify the card; and transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitting circuitry is energized by the modulation control signal. Preferably, the transmitting circuit is energized exclusively by the modulation control signal of the processor means. Consequently, the transmitting circuitry is not connected to another source of energy but only to ground and the processor means; thus, when the modulation signal is 0 volts, the transmitting circuitry does not receive energy that results in any transmission fanta, so it improves the low power consumption characteristics of the card -:. ^ iß ** electronic. Therefore, there is no carrier wave at the output or identification signal and therefore it is a pulsed wave switched between 0 volts and its maximum amplitude. The transmitter circuitry may include passive components and oscillation circuitry which defines a transistor activated directly by the processor means. The transistor in combination with the passive components can form an integral part of the transmitting circuitry which is energized by the modulation signal. The processor means may be configured to provide the modulation control signal with a first part followed by a second part. The first part may include at least one activation pulse of a duration such as to provide sufficient power to the transmitting circuitry to stabilize at least partially for transmission of the second part. The second part may include data defined in a plurality of pulses which are substantially shorter in duration. The signal transmitted by the card transmitter circuitry recalls a combination of an amplitude modulated signal and a pulse width modulated signal. The amplitude modulation of the transmitter under the control of the processor means is typically between about 0.% and about 100%. Consequently, the energy consumed by the transmitter while the data is not transmitter is substantially reduced. However, it should be appreciated that the transmitter circuitry can modulate the amplitude of the identification signal in any percentage between 0% / 100%, so that it represents a plurality of values or levels and not only two levels of "1" and "0". " The modulation control signal may include a plurality of activation pulses which, in combination, provide an identification signal to a card receiver to receive a transmission from the electronic card. The activation pulses are typically approximately 60 10 microseconds in duration with a work cycle of 50%. However, it should be appreciated that the duty cycle or duration may differ in various embodiments of the invention. Therefore, the activation part of the modulation signal can perform a function ^ oble. First, 15 can energize the transmitting circuitry between, preferably a fully inactivated or dormant state, to an operational state in which it has been sufficiently stabilized to transmit the second part comprising a pulse train pulse of a substantially shorter duration. In second On the other hand, the first part allows the receiver to distinguish a transmission from the card of any other transmission, for example an interference signal or the like from another source. Each pulse of the second part of the modulation signal may include a start portion to identify 25 the start of a bit, and a portion of data to identify the . «I ,. . I _J _ ^ __, ______.__ J_t __ ^ __ state of the data bits. The duration of the data portion can selectively define an activated and inactivated state of the • Bit under control of the processor medium. The pulse width can be defined as the sum of the start and data portions. The activated state of the bit is typically defined by a shorter data portion during which the oscillator circuit is inactivated, and an inactivated state of the bit is defined by a larger data portion during which the oscillator circuit is inactivated. 10 The shortest pulse can be used to make a mark or identify the beginning of a bit after which the transmitting circuitry is completely inactivated. The time interval or duration until the transmitting circuitry is activated also defines the state of activation or inactivation of the bit. 15 The amount of energy needed to transmit an activated bit and an inactivated bit is substantially the same since the energy is consumed only to identify the start? } of a data bit. The processor medium is typically a microcontroller 20 which includes an internal RC oscillator on which the modulation control signal is dependent, and the microcontroller is placed to introduce an inactivation mode between the data transmissions so that in this way the power consumption is reduced. Consequently, the transmitter circuitry, 25 under the control of the processor means may be periodically distributed to transmit the identification signal which is discharged in a predetermined time interval, for example approximately ls. Preferably, the identification signal has a duty cycle of approximately 50%. The data is typically transmitted in a digital manner as a series of "1" and "0". Typically, a "0" is transmitted by a transmitter at a time that is approximately l microseconds followed by an inactivation time of equal duration, and a "1" is transmitted by the transmitter that is approximately 5 microseconds followed by a time inactivation of equal duration so that the signal has a duty cycle of 50%. However, it will be appreciated that either of the two different transmission time intervals, controlled by the transmitter processor can be used to communicate a "1" or a "0". In addition, the duty cycle of the pulses may vary. In addition, according to the invention, an identification system is provided which includes: a plurality of electronic cards, each card includes, a processor means programmed to provide a modulation control signal which includes unique identification data which identify at least to the card; and transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitter circuitry is substantially activated by the modulation control signal; and at least one electronic card receiver configured to receive a transmission from the card. The transmit circuit of the electronic card can be energized exclusively by the modulation control signal of the processor means. The transmitter circuitry can include passive components and a transistor driven directly by the processor means. The transistor in combination with the passive components can form an integral part of the transmitting circuitry which is energized by the modulation control signal. The processor means may be configured to provide the modulation control signal with a first part followed by a second part, the first part includes at least one activation pulse of a duration such that it provides sufficient power to the transmitting circuitry at least partially to stabilize for the transmission of the second part which includes data defined in a plurality of pulses which are of a substantially shorter duration. The first part of the modulation control signal may include a plurality of activation pulses which, in combination, provide an identification signal with the signal detection means of the electronic card receiver to receive a transmission of the electronic card.

Each pulse of the second part of the modulation signal may include a start portion to identify the start of a bit and a portion of data to identify a state of the data bits, the duration of the data portion 5 selectively defines a state of activation and inactivation of the bits under the control of the processor medium. The activated bit can be defined by a shorter data portion during which the transmitting circuits are turned off and the low bits are defined by a larger data portion during which the transmitting circuitry is turned off. Additionally, according to the invention, a method for data communication from an electronic card is provided, the method includes activating the transmitting circuitry of the card with a modulation control signal 15 with substantially transmitting circuit energizers. Typically, the modulation control signal energizes exclusively the transmitting circuitry. The transmitter circuitry may include an oscillator which is positioned to oscillate at its fundamental frequency 20 when the data is transmitted and stop the oscillation when data is not transmitted. Accordingly, the method can include selectively modulating a fundamental frequency of the oscillator when the data is transmitted, and inactivating the oscillator when the data is not transmitted.

The modulation control signal may include a first part followed by a second part, the first part includes at least one activation pulse of a duration such as to provide sufficient power to the transmitting circuitry to at least partially stabilize the transmission of the signal. second part which includes data defined in a plurality of pulses which are of a substantially shorter duration. The first part of the modulation control signal may include a plurality of activation pulses which, in combination, provide an identification signal to a card receiver to receive a transmission from the electronic card. Each pulse of the second part of the modulation signal may include a start portion to identify the start of a bit, and a portion of data to identify the state of the data bits, the duration of the data portion selectively defines a state of activation and inactivation of the bits under the control of the processor medium. The activated bit can be defined by a portion of 20 data during which the modulation control signal is turned off and the low bit can be defined as a larger data portion during which the modulation control signal is turned off. The processor means preferably is a microcontroller which includes an internal RC oscillator over which the modulation control signal is dependent and the microcontroller is distributed to introduce an inactivation mode between the data transmissions so that the consumption of the microcontroller is reduced. Energy. The microcontroller may define a transmitter processor which is typically PIC 12C509 or the like, which is programmed with appropriate software to carry out the transmitter control method. Additionally, according to the invention, a receiver is provided to receive a transmission from one of 10 the plurality of electronic cards, the transmission includes a first part and a second part, and the receiver includes detection circuitry to detect the first part and the second part of the transmission, the first part includes at least one activation pulse in response to which the receiver 15 monitors the reception of the second part which includes data defined in a plurality of pulses which are of a substantially shorter duration; and a timing means for timing the duration of each of the pulses in the second part and selectively generating an activated or inactivated output 20 which defines a bit depending on the duration of the pulse. The receiver may include pulse width detection circuitry for decoding the identification signal. The receiver may include: receiver circuitry connected to an antenna to receive the identification signal of 25 at least one electronic card; demodulation circuitry IT IS connected to the receiver circuitry to demodulate the identification signal; amplification circuitry connected to the demodulation circuitry via a capacitive link; and receiver processor circuitry connected to the amplification circuitry to process the identification signal after demodulation thereof. The receiver may include a repeater transmitter for re-transmitting the identification signal to a central control unit. Typically, each card is attached to an item of value, for example a personal computer or other valuable item, which is located in a particular area and a receiver monitors the transmission of identification signals in the area. The central control unit can thus be a wireless communication with a plurality of zones, each of which includes cards associated with monitoring of receivers that are located in valuable items or equipment in the area. The invention is now described, by way of example, with reference to the accompanying diagrammatic drawings. In the drawings: Figure 1 shows a schematic circuit diagram of an electronic card, according to the invention; Figure 2 shows a schematic circuit diagram of a receiver, also according to the invention; - Figure 3 shows a flow chart of a method for controlling the transmission of data via the card of figure 1; Figure 4 shows an example of a download of data 5 transmitted by the transmitter; and Figure 5 shows a flow diagram of a method for decoding data by the receiver of Figure 2. With reference to the drawings, an identification system according to the invention is provided, which includes 10 a plurality of transmitters which are in the form of electronic cards 10 (also according to the invention and only one of which is shown in the drawings), each of which is associated with at least one receiver 12 (see figure 2). Usually, valuable items or the The equipment to be monitored in a selected area, for example computers in a particular office area, are each placed with a card 10 and the receiver 12 is located in the area to monitor the signals received from card 10. receiver 12 is part of a network of receivers which is 20 can be installed in a particular building or similar. Each reciver 12 communicates via a repeater transmitter 14 to a central control unit (not shown). The central control unit can thus monitor and record the authorized or unauthorized removal of the equipment.

Each card 10 includes a transmitter processor means in the form of a microcontroller 16 with associated support circuitry 18 f, and a long-life lithium battery 20. The selected I / O ports of the microcontroller 16 are connected to a connection terminal 22 by means of which the software resides to control the transmission method OR data is programmed into the microcontroller 16. When used, a switch 24 of reading is selectively activated to change the state of the microcontroller 16 in various states f 10 or modes of operation. In one mode of operation, the read switch 24 can function as a detector means, for example; to detect similar movement. In another mode of operation, the read switch 24 can function as a means to enter data to feed data into a memory 15 integrated microcontroller 16, for example, data to uniquely identify the card 10. The microcontroller 16 controls the operation of the transmitter circuit 26 which transmits data, which are the source of the microcontroller 16, to the receiver 12. As can be clearly seen from the schematic diagram of the circuit shown in figure 1, the microcontroller has one of its output ports directly connected to a transistor 25 of the circuitry 26 transmitter. The transmitter circuit 26 also includes passive components 27 25 associates which, in combination, define oscillator circuitry. In addition, the transmitter circuit 26 is not connected to the battery 20 but only to ground and is energized exclusively by the modulation control signal from the microcontroller via the line 28. Therefore, the transmitter circuit 26 changes state 5 between a state of "on", in which it transmits a pulse via its antenna 29, and a state "off" in which it receives no energy whatsoever and is therefore completely inactivated. To allow the transmitter circuitry 26 to be stabilized for data transmission, the microcontroller 16 feeds three pulses (part of a pulse 31 is shown in FIG. 4), each pulse has an activation portion of between about 20 and about 70 microseconds , usually about 60 microseconds, and a 50% duty cycle, to the transmitting circuitry via line 28. In particular, the modulation control signal generated by software of the microcontroller 16 has a first part followed by} for a second part. The first part includes the three activation pulses of a duration of approximately 60 microseconds 20 which are generated by the "pulse 4" routine in Table 2. As shown by arrow 150 in Table 2, the subroutine of "pulse 4" (see arrow 152) is requested three times. The activation part of the modulation signal performs a double function. First, it energizes the transmitter circuitry 26 between, preferably, a fully inactivated state or .- ".-- dormant, to an operating state in which it has been stabilized sufficiently to transmit the second part comprising a pulsed train pulse of substantially shorter duration. Secondly, the first part allows the receiver 5 to distinguish a transmission from the card, from any other transmission, for example an interference signal or the like from another source. The microcontroller 16 controls the transmission of the unique identification data in the second part of the modulation control signal by means of a method, also according to the invention, which is carried out in its resident software, the method used by the microcontroller 16 is set forth in Table 2 (see arrow 154). In particular, microcontroller 16 controls the transmitter circuitry 26 of a 15 such that its signal or identification is modulated in terms of amplitude and modulated in terms of pulse width. The amplitude modulation of the transmitted signal varies between about 0% and about 100% modulation when it represents both "1" and "0" (see Figure 3). The transmitted signal has a 20 duty cycle of 50% and a "1" is transmitted, for example, by a pulse with an "on" time of 5 microseconds, followed by an "off" time of 5 microseconds resulting in a width of total pulse of 10 microseconds "see figure 4". On the other hand, a "0" is transmitted by a pulse with a 25"on" time of 10 microseconds and a "off" time of 10 microseconds resulting in a total pulse width of 20 microseconds. The total duration of the pulse, that is, 10 microseconds or 20 microseconds, which determines the state of a bit (see arrow 156 and the following in Table 5). It is transmitted in a plurality of pulses in a data download and the data download is typically transmitted by the card 10 periodically in a time interval of approximately 1 second. However, it should be appreciated that the pulses of the second part do not necessarily have a cycle of 10 work of 50% since the activated state of the pulse 33 (see Figure 4) acts as a marker or starting portion that identifies the start of a bit. Subsequently, a data portion defines the bit state, the duration 35 of the data portion is the total width of the pulse and includes its "off". In the In this embodiment, the data portion 35 defines an activated or inactivated state of the bit by a "shutdown" time of 10 microsecond transmitter circuitry and a "off" time of transmitter circuitry of 20 microseconds, respectively (see FIG. 3) . When the receiver 12 receives 20 a transmission from the card 10, determines the total length or duration of the pulse and assigns a "1" or "0", as shown in figure 5. Typically, the microcontroller 16 includes a counter which has its readjustment. account when you install the 25 battery 20 and subsequently increases its account each time the transmitting circuit 26 transmits a data download. The data from the microcontroller 16 is fed to the transmitter circuit 26 via the line 28. It will be appreciated that the data transmitted by the card 10 may include a value of the account, unique identification data to identify the card 10, data detected by the read switch 26 or any other data. The microcontroller 16 of the card 10 does not use a crystal oscillator to control its operation but rather 10 uses an internal RC oscillator that is provided on the chip. It is considered that the energy consumption of the card 10 is therefore reduced and the starting delays are faster. Accordingly, to further reduce the power consumption of the card 10, the card 10 is in the inactivated state 15 or sleeper between each download of data which it transmits. To obtain this, a second inactive or dormant standby RC oscillator is used which is provided in the microcontroller 16. As shown in block 30, after a predetermined time interval has elapsed, Typically from about 0.7 to about ls (see arrow 158 in Table 2), the microcontroller 16 is instructed to start / wake up. Subsequently, the unique identification code and other data to be transmitted by the card 10 are established as shown in block 32, 25 later the data is configured in a serial manner as Mmm? shows in block 34, where the next / first octet of the remaining octets (designated by X) is fed to the transmitter circuit 26, as shown in block 36. The microcontroller 16 then analyzes (see block 38) each bit 5 in the sequence in series. If the bit is a logical "1", the transmitting circuitry 26 is activated to transmit a pulse which is activated for 5 microseconds, as shown in block 40 and, subsequently, an inactivation of 5 microseconds is implemented, as shown in block 42 to ensure that 10 the transmitted signal has a duty cycle of 50% and a total pulse width of 10 microseconds. However, if the bit is a logical "0", the transmitting circuit 26 is then instructed to transmit a pulse which is activated for 10 microseconds, as shown in block 44, 15 followed by an inactivation of 10 microseconds, as shown in block 46, which provides a 50% duty cycle and a total pulse width of 20 microseconds when a "0" is transmitted. If all the bits of the octet have been 20 transmitted, as shown in block 48, microcontroller 16 is instructed to increment its pointer to the next octet, as shown in block 50 (see also arrow 154 in table 2). However, if all of the 8 bits of the octet have not been transmitted, then the 25 microcontroller 16 to search and fetch the next bit, as shown in block 52 and the procedure is repeated as set forth above. As shown in block 54, if the last octet to be sent in the download has been sent, then the microcontroller 16 returns to the dormant or dormant mode (see block 55) for a predetermined time interval. However, if the last octet has not yet been sent, then the microcontroller 16 searches for and brings the next octet, as shown in block 34. With reference in particular to Figure 2 of the 10 drawings, the receiver 2 includes a receiver processor 16 defined by a receiver microcontroller 58, for example, a PIC 16F84 or the like. The selected I / O ports of the receiver microcontroller 58 are connected to the 60 I / O terminals to allow the resident software to be programmed into the microcontroller 58 15 by an external device such as a PC or the like. The receiver microcontroller 58 is connected via line 62 to the OB repeater transmitter 14. 546. "Modulation control signal provided by an output port of microcontroller 58 via line 62. 20 The identification signal transmitted by the card 10 is received by the receiver circuit 68 which has its output signal fed into an RF amplifier 74 and into the demodulation circuit 70 via the line 72. The demodulation circuit 70 has its output connected, via the capacitor 76 of decoupling, to amplification circuitry generally indicated by reference numeral 78 which comprises a series of operational amplifications. An output stage of the operational amplifiers is connected via line 80 to a port of the receiver microcontroller 58. The energy for the 5 different components in receiver 12 is provided by an energy supply unit 82. The selected I / O ports of the receiver microcontroller 58 are connected to a programming terminal 84 on which the appropriate software is fed to control the operation method of the receiver 12, within the receiver microcontroller 58. The control method of the receiver 12 is set forth in Table 1 and is described in greater detail in the following.

With particular reference to Figure 5 of the 15 drawings, the receiving software first includes the method for resetting the bit / octet information, as shown in block 86. The initialization of the bit / octet information and the various different operation parameters are generally indicated by the arrow 160 and the following in Table 1. The 20 arrow 162 marks the start of the routine where the microcontroller 58 ports are initialized. The software implements the method and then waits for an activation input, as shown in block 88. When an activation entry has been received, the duration of the pulse is monitored. In particular, the The "HIGl" routine (see arrow 164 in Table 1) determines the duration for which the pulse is activated, and the "HIG2" routine determines the duration for which the pulse is inactivated "see arrow 166". The sum of the duration is activation and inactivation then calculated to verify if the total duration is within an acceptable range which is typically between about 50 and about 70 microseconds. Therefore, the duration time of the interval between points is counted or determined until the next activation is received, as shown in block 90. If the interval is 10 microseconds (ie, an activation of 5 microseconds) followed by an inactivation of 5 microseconds), as shown in block 92, then the incoming bit of data download received from card 10 is a "1", as shown in block 94. Subsequently, it is implemented the bit counter in one, as shown in block 96, and if it is the last bit of the count (see block 98), then the bit / octet is reset, as shown by line 100 leading to the block 86. However, if the interval is not equal to 10 microseconds, then the interval time is taken to determine whether or not it is equal to approximately 20 microseconds (ie, 10 microseconds activated followed by 10 microseconds inactivated). If the delay is equal to approximately 20 microseconds, then the bit is recognized as a "0", as shown in block 104 and, once again, the bit counter is incremented as shown in block 96. However , if he -J ---, - interval is not equal to 20 microseconds, then the method includes resetting bits / octet, as shown by line 106 leading to block 86. The routine to recognize a "1" or a "0" is generally indicated by arrow 168 in 5 of Table 1. Table 1 also includes several additional routines, for example an RS 232 routine, to feed data to other devices. It will be appreciated that the receiver microcontroller 58 may include a variety of additional routines to allow communication of data received from the card 10 to be communicated with other devices.

The inventor considers that the invention, as illustrated, provides an identification system that includes a method for communicating data from the card 10 to the receiver 12. 15 which has reduced the energy consumption characteristics. The features of the invention that improve the characteristics of low energy consumption include the energy endowment of the circuitry ^ 26 transmitter by means of the modulation control signal and the distribution in which the state of a bit is determined by the 20"off" time of the transmitter circuitry 26. The power consumption of the card 10 is also substantially reduced when the card 10 is in the inactive or dormant mode.

TABLE 1 ; ds5000 dev capetown system with dave 5; update verification for frequency and stat less than 64 current program SEQUENCE OF CORRECTED START FOR ERRORS AND SPEED INCREASE 10; 1 DATA BIT CORRECTED DECREASE START FRAME ACTIVATED E INACTIVE ADD VERIFICATION FOR CHECKSUM 15 list p = 16f84, f = inhxdm _CONFIG 3FF1H INDIR 0 FSR = 4 20 PORTA-5 PORTB = 6 TRISA _ 85h TRISIB = 86h TMRO = 1 25 STATUS = 3 -i- -.,. ,,,. | . _É¿ ___ ¿__ PCL = 2 OPTN - 81h F INTCON = OB 5 RPO EQU 5 TEMP2 EQU 11h TEMP1 EQU 12h TIMER1 EQU 13h; TIMER TEMP VALUEX EQU 14h; TEMP F 10 DIGIT1 EQU 15h TEMP DIGIT2 EQU 16h TEMP DIGIT3 EQU 17h TEMP ASCII EQU 18h; TEMP VALUÉ EQU 19h 15 TEMP equ 2Oh, - Ub ic ation of a temporary soul, CHAR EQU 21h; Storage location of F character 20 DIGITS EQU 22h VALUÉ1 EQU 23h VALUÉ2 EQU 24h VALUÉ3 EQU 25h VALUÉ4 EQU 26h 25 VALUÉ5 EQU 27h ___ ^ _ ^ ¡_ ^ _ g _ ^ _ VALUÉ6 EQU 28h VALUÉ7 EQU 29h 160 F VALUÉ8 EQU 2Ah VALUÉ9 EQU 2Bh 5 VALUÉ10 EQU 2Ch VALUÉ11 EQU 2Dh VALUÉ12 EQU 2Eh VALUÉ13 EQU 2Eh VALUÉ14 ¿u 30h F 10 CALB EQU 31h CALA EQU 32h DLINE EQU 33h CHECK1 EQU 36h CHECK2 EQU 37h 15 CHECK3 EQU 38h CHECKX EQU 39h CSUm EQU 3Ah; CHECK SUM CSUM2 EQU 3Bh 20 DAT EQU PORTB CNTRL EQU PORTA E EQU 3 RW EQU 2 RS EQU 1 25 C EQU 0 w EQU 0 F EQU 1 F P EQU 0 5 HOME CLRF DLINE F 10 CLRF CHECK1 cali LCDlnit cali LCDlnit CALL LCDlnit 15 BCF PORTB, 0 ; PRINCIPAL twenty; ESTABLISH TIMER / COUNTER movlw OPTN movwf FSR movlw OOh; 20h = counter + tube without preliminary counter 25 movwf INDIR _-- ^ _ * a »J- clr TMRO F bcf STATUS, RPO clrf PORTA clrf PORTB; Configure ports A and D to outputs bsf STATUS, RPO; Select page 1 of registration movlw B'000000001; Set 4 bit ios F 10 lower in PORTB movwf TRISB; as outputs movlw B'00000011 '/ Set port_a as outputs movwf TRISA 15 bcf STATUS, RPO; Select page 0 of registry clrf PORTA; clear port_a MOVLW .5 MOVWF TEMP2 20 MOVLW .10 MOVWF TIMER1 MOVLW .100 MOVWF TEMP1 25 ZXC INCF TEMP1, F l INCF TEMP1,, F INCF TEMP1,, F F CALL BEEP DECFSZ TEMP 2 1 GOTO ZXC ' CLRF PORTA MAIN F 10 BCF PORTB, 1 BCF PORTB, 4; B 0 BCF PORTA, 0 NOP 15 CLRF CSUM SSA BTFSS CHECKl, 1 20; GOTO HIG1 BSF PORTB, 4; TO OPEN THE DOOR AND MARK MOVLW 5; WAS 20 MOVWF TEMP2 MOVLW .10 25; MOVWF TIMER1 ___ _ ^ _ u _? _ aa_t_a_ _tf_M_Í_l MOVLW .100 MOVWF TEMP1 F: XXC CALL BEEP DECFSZ TEMP2,1 GOTO XXC MOVLW .50; 100 = 3sec F 10 MOVWF TIMER1: RTR1 MOVLW .200 .200 MOVWF CHECK2 RRTR MOVLW MOVWF TEMP1 15 • RTR2 DECFSZ TEMP1, F GOTO GOTO RTR2 DECFSZ CHECK2 F RTR DECFSZ TIMER1 20 GOTO RTR1 BCF PORTB, 4 CLRF CHECKl CLRF CHECKX 25 BTFSS PORTA, 0 GOTO HIG1 CLRF TEMP1 HWW1 NOP NOP NOP INCFSZ TEMP1, F GOTO HWZl GOTO HIG1 HWZl BTFSC PORTA .0 GOTO HWW1; wait for ACTIVATION BTFSC TEMP1,3; 8 GOTO HIG2 BTFSC TEMP1,4; 16 GOTO HIG2 BTFSC TEMP1, 5; 32 GOTO HIG2 BTFSC TEMP1,6; 64 GOTO HIG2 BTFSC TEMP1,7; 128 GOTO HIG2 GOTO HIG1 HIG2 CLRF TEMP1 HWW2 NOP 66 NOP NOP INCFSZ TEMP1, F GOTO HWZ2 GOTO HIG1 HWZ2 BTFSS PORTA, 0 GOTO HWW2, -wait by ACTIVATION BTFSC TEMP1,3; 8 GOTO HIG3 BTFSC TEMP1,4; 16 GOTO HIG3 BTFSC TEMP1,5; 32 GOTO HIG3 BTFSC TEMP1,6; 64 GOTO HIG3 BTFSC TEMP1,7; 128 GOTO HIG3 GOTO HIG1 HIG3 CLRF TEMP1 HWW3 NOP NOP NOP INCFSZ TEMP1, F GOTO HWZ3 ^ H & GOTO HIG1 HWZ3 BTFSC PORTA, 0 GOTO HWW3; wait for ACTIVATION / BTFSC TEMP1,3; 8 5 / GOTO HIG4 BTFSC TEMP1,4; 16 GOTO HIG4 BTFSC TEMP1.5; 32 GOTO HIG4 F 10 BTFSC TEMP1,6; 64 GOTO HIG4 BTFSC TEMP1, 7; 128 GOTO HIG4 GOTO HIG1 15 HIG4 CLRF TEMP1 HWW4 NOP NOP F NOP INCFSZ TEMP1, F 20 GOTO HWZ4 'GOTO HIG1 HWZ4 BTFSS PORTA, 0 GOTO HWW4; wait for ACTIVATION / BTFSC TEMP1,3; 8 25 GOTO HIG5 BTFSC TEMP1,4; 16 GOTO HIG5 F BTFSC TEMP1.5; 32 GOTO HIG5 5 BTFSC TEMP? , 6; 64 GOTO HIG5 BTFSC TEMP1, 7 128 GOTO HIG5 GOTO HIG1 F 10 HIGS CLRF TEMP1 HWWS NOP NOP NOP INCFSZ TEMP1, F 15 GOTO HWZ5 GOTO HIG1 HWZ5 BTFSC PORTA.0 F GOTO HWW5; wait for ACTIVATION / BTFSC TEMP1,8; 8 REPEATER ONLY 2 GOTO HIG6 BTFSC TEMP1,4; 16 GOTO HIG6 BTFSC TEMP1, 5; 32 GOTO HIG6 25 BTFSC TEMP1, 6; 64 - "----- • GOTO HIG6 BTFSC TEMP1, 7 128 GOTO HIG6 GOTO HIG1 HIG6 CLRF TEMP1 HWW6 NOP NOP NOP INCFSZ TEMP1, F GOTO HWZ6 GOTO HIG1 HWZ6 BTFSS PORTA, .0 GOTO HWW6; wait for ACTIVATION BTFSS TEMP1, .3; 8 GOTO HIG7 BTFSC TEMP1, 4; 16 GOTO HIG7 BTFSC TEMP1, 5; 32 GOTO HIG7 BTFSC TEMP1, 6; 64 GOTO HIG7 BTFSC TEMP1, 7; 128 GOTO HIG7 GOTO HIG1 - "- ---- HIG7. ********* pi ********** F CLRF VALUÉ1 5; SX1 BTFSC PORTA, 0 GOTO SX1 INCF VALUÉ1 MOVLW .200 MOVWF VALUÉ2 F 10; LX1 DECFSZ VALUÉ2, F GOTO NOE GOTO ENDF; NOE BTFSS PORTA, 0 GOTO LX1 15; GOTO SX1 ; ENDF GOTO SKIPP NOP 20 CLRF VALUÉ1 CALL WAITD MOVF TIMER1, W 25 MOVWF VALUÉ1 »- ** • CALL WAITD MOVF TIMER1, W MOVWF VALUÉ2 CALL WAITD MOVF TIMER1, W MOVWF VALUÉ3 CALL WAITD MOVF TIMER, 1W MOVWF VALUE4 CALL WAITD MOVF TIMER1,, W MOVWF VALUÉ5 CALL WAITD MOVF TIMER1,, W MOVWF VALUÉ6 CALL WAITD MOVF TIMER1, W MOVWF VALUÉ7 CALL WAITD MOVF TIMER1, W - ^ jg »j ^ ¡ggs MOVWF VALUÉ 8 F CALL WAITD MOVF TIMER1, W MOVWF VALUÉ 9 CALL WAITD MOVF TIMER1.W MGVWF VALUÉ 10 F 10 CALL WAITD MOVF TIMER1, W MOVWF VALUÉ 11 15 CALL WAITD MOVF TIMER1.W MOVWF VALUÉ 12 F CALL WAITD 20 MOVF TIMER1, W MOVWF VALUÉ 13 CALL WAITD MOVF TIMER1, W 25 MOVWF VALUÉ 14 CALL WAITD MOVF TIMER1, W MOVWF VALUÉ15 CALL WAITD MOVF TIMER1, W MOVWF VALUÉ16 CALL WAITD; VERIFY SUM MOVF TIMER1, W MOVWF CSUM MOVLW .98; REC ID MOVWF VALUÉ15 VERIFY DATA goto tst7 MOVF VALUÉ1, W ADDWF VAWE2. W ADDWF VALUÉ3, W ADDWF VALUÉ4, W ADDWF VALUÉ5, W ADDWF VALUEG, W ADDWF VALUÉ7, W ADDWF VALUÉ8, ADDWF VALUÉ, W ADDWF VALUÉ10, W ADDWF VALUÉ11, W ADDWF VALUÉ12, W ADDWF VALUÉ13, W ADDWF VALUÉ14, ADDWF VALUÉ15 W MOVWF CSUM2 10 MOVF CSUM, W; VERIFY SUM SUBWF CSUM2, W MOVWF TEMP1 BTFSC TEMP1,0 GOTO OUT 15 BTFSC TEMP1, 1 GOTO OUT BTFSC TEMP1, 2 BTFSC TEMP1,3 20 GOTO OUT BTFSC TEMP1, 4 GOTO OUT BTFSC TEMP1.5 GOTO OUT 25 BTFSC TEMP1.6 GOTO OUT BTFSC TEMP1, 7 GOTO OUT MOVF CSUM2, w; VERIFY SUM SUBWF CSUM.W MOVWF TEMP1 BTFSC TEMP1, .0 GOTO OUT BTFSC TEMP1, 1 GOTO OUT BTFSC TEMP1, .2 GOTO OUT BTFSC TEMP1,, 3 GOTO OUT BTFSC TEMP1,, 4 GOTO OUT BTFSC TEMP1, 5 GOTO OUT BTFSC TEMP1, 6 GOTO OUT BTFSC TEMP1, 7 GOTO OUT MOVF VALUÉ2, W; CHECK STAT AND FREQUENCY F MOVWF TEMP1 BTFSC TEMP1.6 GOTO OUT BTFSC TEMP1,7 GOTO OUT MOVF VALUÉ3, W; VERIFY STAT AND FREQUENCY F 10 MOVWF TEMP1 BTFSC TEMP1, 6 GOTO OUT BTFSC TEMP1, 7 GOTO OUT 15; goto tsp7; skip search for P or Q; search by P or Q MOVLW .80, -es 80h less bit 0 SUBWF VALUÉ 16.W 20 MOVWF TEMP1 BTFSC TEM 1.0; SEARCH ONLY BY P GOTO OUT REM = BTFSC TEMP1, 1 P, Q, R, S GOTO OUT 25 BTFSC TEMP1,2 .L GOTO OUT BTFSC TEMP1, 3 F GOTO OUT BTFSC TEMP1, 4 GOTO OUT BTFSC TEMP1, 5 GOTO OUT BTFSC TEMP1, 6 GOTO OUT F 10 BTFSC TEMP1, .7 GOTO OUT tst7 15 / TURN ON 10 PORTB 0 PIN 6 MOVW .84; T SUBWF VALUÉ1, W MOVWF TEMP1 20; BTFSC TEMP1,0 / comment GOTO KKK / WAS KKL BTFSC TEMP1,1 GOTO KKK BTFSC TEMP 1.2 25; GOTO KKK & sé ^ BTFSC TEMP1, 3 GOTO KKK BTFSC TEMP1, 4 GOTO KKK 5; BTFSC TEMPT, 5 GOTO KKK BTFSC TEMP1, 6 GOTO KKK BTFSC TEMP1, 7 F 10 GOTO KKK INCF CHECKl GOTO KKD KKK MOVLW .69; E 15; SUBWF VALUE1, W MOVWF TEMP1 BTFSC TEMP1, .0; commentary F GOTO KKS / WAS KKL BTFSC TEMP1. , 1 20 / GOTO KKS BTFSC TEMP1,, 2 GOTO KKS BTFSC TEMP1,, 3 GOTO KKS 25 / BTFSC TEMP1, .4 GOTO KKS BTFSC TEMP1, 5 GOTO KKS BTFSC TEMP1, 6 GOTO KKS BTFSC TEMP1,7 GOTO KKS INCF CHECKX GOTO KKD KKS CLRF CHECKl CLRF CHECKX KKD BSF PORTB, 4 MOVLW .5 r MOVWF TEMP2, MOVLW .20, MOVWF TIMER1 MOVLW .200 MOVWF TEMP1 MOVLW .50 / 100 = 3sec MOVWF TIMER1; rRTRl MOVLW .200 ^ ¿ßg »2_ß_3_¡ _? _ Í_ MOVWF CHECK2; RTR MOVLW .200 F MOVWF TEMP1; RTR2 DECFSZ TEMP1, F 5; GOTO RTR2 DECFSZ CHECK2 GOTO RTR DECFSZ TIMER1 GOTO RTR1 F 10 KKL ; check by alarm on 15 OKD MOVLW .50; was 49 SUBWF VALUÉ3, W MOVWF TEMP1 BTFSC TEMP1, 0 20; GOTO OUT3; WAS 1 BTFSC TEMP1, 1 GOTO OUT3 BTFSC TEMP1, 2 GOTO OUT3 25; BTFSC TEMP1, 3 _ ^ _- _g_ «GOTO OUT3 BTFSC TEMP1,4 GOTO OUT3 BTFSC TEMP1,5 5; GOTO OUT3 BTFSC TEMP1.6 GOTO OUT3 BTFSC TEMP1,7 GOTO OUT3 F 10; CLRF CHECKl GOTO OUT2; WAS 1 OUTPUT 2: ALARM ACTIVATE SHORT-DURATION TONE EMISSION fifteen; MOVLW .5 MOVWF TEMP2 MOVLW .10 F MOVWF TIMER1 MOVLW .100 20; MOVWF TEMP1 ; ZXC1 INCF TEMP1, F INCF TEMP1, F INCF TEMP1, F 25; CALL BEEP -__ _ - ------ DECFSZ TEMP 2, 1 GOTO ZXCl MOVLW .200 5; MOVWF TIMER1 MOVLW .100 MOVWF TEMP1 CALL BEEP GOTO SKIPP F 10 OUTPUT1; NOT OBSERVED AT T; UNIT VIEW NO TO T TO SET ALARM OFF IF OBSERVED MORE THAN 4 TIMES fifteen; BTFSS CHECKl, 3; WAS 3 INCF CHECKl, F BTFSS CHECKl, 3 F GOTO OUT3 NOP 20 GOTO OUT2 / SET ALARM OFF OUTPUT3 MOVLW .10, -is a 5 MOVWF TIMER1 25; MOVLW .20, -is a 10 MOVWF TEMP1 CALL BEEP GOTO SKIP 5 EXIT / VALUE WITHOUT RIGHT TO RETURN AND READ AGAIN MOVLW .200 MOVWF TIMER1 MOVLW .100 F 10 MOVWF TEMP1 CALL BEEP GOTO MAIN 15 JUMPING F OUTV 20 BSF PORTB, 1 GOTO GKL / NOT FOR EXHIBITION GKL / SEND ALARM DATA ONLY 25 TO .

BTFSS PORTA, 1 GOTO TX2 MOVLW .50 / mas 2A = T SUBWF VALUÉ3, W MOVWF TEMP1 BTFSC TEMP1, 0 GOTO TX1 BTFSC TEMP1, 1 GOTO TX1 BTFSC TEMP1, 2 GOTO TX1 BTIFSC TEMP1, 3 GOTO TX1 BUSC TEMP1, 4 GOTO TX1 BTFSC TEMP1, 5 GOTO TX1 BTFSC TEMP1, 6 GOTO TX1 BTFSC TEMP1 , 7 GOTO TX1 GOTO TX2 TX1 GOTO MAIN TX2 / PC VERSION FOR DS5000 MOVLW 65h CALL TXDATA MOVLW 65h CALL TXDATA (MOVLW .33 CALL TXDATA MOVLW .42 CALL TXDATA MOVLW .42 5 CALL TXDATA MOVF VALUÉ 1, W CALL TXDATA MOVF VALUÉ 2, W CALL TXDATA 0 MOVF VALUÉ 3, W CALL TXDATA MOVLW .65 CALL TXDATA 5 MOVLW .66 CALL TXDATA MOVLW .67 CALL TXDATA MOVF VALUE4, W CALL TXDATA MOVF VALUÉSM MOVLW .48 (CALL TXDATA MOVF VALUÉ6, W CALL TXDATA MOVF VALUÉ7, W CALL TXDATA 5 MOVF VALUÉ8, W CALL TXDATA MOVF VALUÉ1, W CALL TXDATA 0 MOVF VALUÉ9, W CALL TXDATA MOVF VALUÉ10, W CALL TXDATA MOVF VALUÉ11, W 5 CALL TXDATA MOVF VALUÉ12.W CALL TXDATA MOVF VALUE13,, w CALL TXDATA MOVF VALUÉ14,, CALL TXDATA MOVF VALUE15,, w CALL TXDATA MOVF VALUE16,, w F 10 CALL TXDATA MOVLW .48 CALL TXDATA 15 MOVLW OAh CALL TXDATA MOVLW ODh F CALL TXDATA MOVLW 80h 20 CALL TXDATA BSF PORTB, 2 TERRYX 25 __§ ___-_ MOVLW .01 MOVWF CHECK3 TERRYY GOTO MAIN GOTO NOTX, • tx data on MOVF VALUÉ1,0 ADDWF VALUÉ2, 0 ADDWF VALUÉ3, 0 ADDWF VALUÉ4, 0 ADDWF VALUÉ5, 0 ADDWF VALUÉ6,0 ADDWF VALUÉ7,0 ADDWF VALUÉ8,0 ADDWF VALUÉ9,0 ADDWF VALUÉ10,0 ADDWF VALUÉ11,0 ADDWF VALUÉ12,0 ADDWF VALUÉ13,0 ADDWF VALUÉ14, 0 ADDWF VALUÉ15.0 MOVWF CSUM MOVLW 2Oh / was 20 MOVWF TEMP1 movlw 20h movwf TEMP CALL pulse4 MOVLW 20h MOVWF TEMP1 MOVLW 20h / EN 20 AND INITIATE MOVWF TEMP CALL press4 movlw 20h movwf TEMP caN Ppulse4 MOVLW .04; TX IN TIME MOVWF TEMP1 movf VALUE 1, 0 / en 10 h movwf TEMP cali pulse movf VALUÉ2, 0 movwf TEMP cali press moviw .50 movf VALUÉ3,, 0 movwf TEMP caf1 pulse movf VALUE4,, 0 movwf TEMP (cali pulse movf VALUÉ5,, 0 movwf TEMP cali press 5 movf VALUÉ6, 0 movwf TEMP cali pulse 0 movf VALUE 7, 0 movwf TEMP cali pulse movf VALUÉ8, 0 5 movwf TEMP L ~ J¿ * »&« to «Oai cali press movf VALUÉ9, 0 movwf TEMP cali pulse movf VALUÉ10,0 movwf TEMP cali pulse movf VALUÉ11,0 movwf TEMP cali pulse movf VALUÉ12, 0 movwf TEMP cali pulse movf VALUÉ13,0 movwf TEMP cali pulse movf VALUÉ14,0 movwf TEMP cali pulse movf VALUE15, 0 movwf TEMP cali pulse 5 / movf VALUÉ16.0 movlw .83 movwf TEMP cali pulse F 10 MOVF CSUM, 0 MOVWF TEMP CALL press cali pulse5 15 DECFSZ CHECK3, F GOTO TERRYY F NOTX 20 MOVLW 65h CALL XXDATA MOVLW 66h CALL XXDATA 25 MOVLW .33 CALL XXDATA MOVLW .42 CALL XXDATA MOVLW .42 CALL XXDATA MOVF VALUÉ1, W CALL XXDATA MOVF VALUÉ2. W CALL XXDATA MOVF VALUÉ3, W CALL XXDATA MOVLW .65 CALL XXDATA MOVLW .66 CALL XXDATA MOVLW .67 CALL XXDATA MOVF VALUE4, W CALL XXDATA MOVF VALUÉ5, W MOVLW .48 CALL XXDATA MOVF VALUÉ6. , W CALL XXDATA MOVF VALUÉ7, w CALL XXDATA MOVF VALUÉ8, w CALL XXDATA MOVF VALUÉ1, W CALL XXDATA MOVF VALUÉ9, W CALL XXDATA MOVF VALUÉ10, W CALL XXDATA MOVF VALUÉ11, W CALL XXDATA MOVF VALUÉ12.W CALL XXDATA MOVF VALUÉ13, W CALL XXDATA MOVF VALUÉ14, CALL XXDATA MOVF VALUÉ15, CALL XXDATA MOVF VALUÉ16, W CALL XXDATA MOVLW .48 CALL XXDATA MOVLW OAh CALL XXDATA MOVLW ODh CALL XXDATA F 10 MOVLW 80h CALL XXDATA MOVLW 80h CALL XXDATA 15 BCF PORTB, 2 GOTO MAIN F pulse 20 BTFSS TEMP, 0 CALL pulse3 BTFSC TEMP, 0 cali pulse2 25 BTFSS TEMP, 1 CALL press3 BTFSC TEMP, 1 cali pulse2 BTFSS TEMP, 2 CALL press3 BTFSC TEMP, 2 cali pulse2 BTFSS TEMP, 3 CALL press3 BTFSC TEMP, 3 cali pulse2 BTFSS TEMP, 4 CALL press3 BTFSC TEM, 4 cali pulse2 BTFSS TEMP, 5 CALL press3 BTFSC TEMP, 5 cali pulse2 BTFSS TEMP .6 CALL pulse3 BTFSC TEMP .6 cali punch2 BTFSS TEMP, 7 CALL pulsed BTFSC TEMP, 7 cali pulsed / CALL pulse5 return pulsed clrwdt MOVF TEMP1, W movwf TIMER1 bsf PORTB, 3, -activated for 3 6 9 12 ETC; diiig NOP NOP NOP nop nop nop nop; new nop nop nop 5 decfsz TIMER1, 1 goto diiig BCF PORTB .3; 46 cycle off F 10 MOVLW .22, -was 18 MOVWF TIMER1 TNY2 DECFSZ TIMER1,1 GOTO TNY2 15 RETURN pulse2 clrwdt F MOVF TEMP1, W 20 movwf TIMER1 bsf PORTB, 3, -power for 3 6 9 12 ETC. ddgf NOP NOP NOP 25 NOP NOP NOP NOP nop nop nop decfsz TIMER1,1 goto ddgf BCF PORTB .3, -cycle 46 off MOVLW .17 / FUE 13 MOVWF TIMER1 TNY1 DECFSZ TIMER1,1 GOTO TNY1 RETURN press5 clrwdt MOVF TEMP1, W movwf TIMER1 bsf PORTB.3 / activated for 3 6 9 12 ETC. digg NOP NOP NOP decfsz TIMER1, 1 goto digg BCF PORTB, 3 / cycle 46 off NOP NOP NOP NOP NOP NOP RETURN press 3 clrwdt MOVF TEMP1, W movwf TIMER1 bsf PORTB, 3 / on for 3 6 9 12 ETC. digpp NOP NOP NOP decfsz TIMER1, 1 goto digpp BCF PORTB, 3, -cycle 46 off _ _ _, __--- ^ - ^ ~ - > ^ MOVLW .3 MOVWF TIMER1 TNY4 NOP NOP NOP DECFSZ TIMER1, 1 GOTO TNY4 RETURN pulse4 clrwdt MOVF TEMP1, W movwf TIMER1 NOP NOP; 12 CYCLES NOP NOP bsf PORTB, 3, - ignition for 46us digph NOP NOP NOP dectsz TIMER1,1 goto digph BCF PORTB, 3, -cycle 46 off digf NOP .L., -_.- .- NOP NOP decfsz TEMP, 1 goto digf NOP NOP RETURN TXDATA F 10 MOVWF TEMP cali PPSE2 nop nop nop nop nop nop F BTFSS TEM, 0 CALL PPSE2 20 BTFSC TEMP, 0 cali PPSE-3 BTFSS TEMP, 1 CALL PPSE2 BTFSC TEMP, 1 cali PPSE3 BTFSS TEMP, 2 CALL PPSE2 BTFSC TEMP .2 cali PPSE3 BTFSS TEMP, 3 f 10 CALL PPSE2 BTFSC TEMP, 3 cali PPSE3 BTFSS TEMP, 4 15 CALL PPSE2 BTFSC TEMP, 4 cali PPSE3 F STFSS TEMP, 5 20 CALL PPSE2 BTFSC TEMP, 5 cali PPSE3 BTFSS TEMP .6 25 CALL PPSE2 BTFSC TEMP, 6 cali PPSE3 BTFSS TEMP, 7 CALL PPSE2 BTFSC TEM, 7 cali PPSE3 CALL PPSE3 f 10 cali PPSE3 return XXDATA 15 MOVWF TEMP cali PPSE3 cali PPSE3 cali PPSE3 20 cali PPSE3 cali PPSE3 cali XPSE2, -was2 nop 25 nope Ryy ^. ^ Niíf ^ A ^ Sm '^^ liii ^ r nop nop nop BTFSS TEMP, 0 CALL XPSE2 BTFSC TEMP, 0 cali XPSE3 BTFSS TEMP, 1 CALL XPSE2 BTFSC TEMP, 1 cali XPSE3 BTFSS ^ EMP, 2 CALL XPSE2 BTFSC TEMP, 2 cali XPSE3 BTFSS TEMP, 3 CALL XPSE2 BTFSC TEMP, 3 cali XPSE3 BTFSS TEMP, 4 CALL XPSE2 STFSC TEMP, 4 cali XPSE3 BTFSS TEMP, 5 CALL XPSE2 BTFSC TEMP, 5 cali XPSE3 10 BTFSS TEMP, 6 CALL XPSE2 BTFSC TEMP, 6 cali XPSE3 15 BTFSS TEMP, 7 CALL XPSE2 BTFSC TEMP, 7 F Cali XPSE3 20 CALL XPSE3 cali XPSE3 / was3 CALL XPSE2 25 return i- -? - f l_f_M __ ^ PPSE2 clrwdt MOVLW .7 movwf TEMP1 bsf PORTB. .2 / on for 3 6 9 12 ETC. dighh decfsz TEMP1, 1 goto dighh NOP NOP F 10 NOP RETURN PPSE3 clrwdt MOVLW .7 15 movwf TEMP1 bcf PORTB, 2 / on for 3 6 9 12 ETC. F diggh decfsz TEMP1,1 goto diggh 20 NOP NOP NOP RETURN 25 XPSE2 clrwdt ! _--. . _ _ - - __ «--- ggigjtí¡ MOVLW .7 movwf TEMP1 bcf PORTB .2 / was bsf on for 3 6 9 12 ETC.

Xighh decfsz TEMP1, 1 goto Xighh NOP NOP F 10 NOP RETURN XPSE3 clrwdt MOVLW .7 15 movwf TEMP1 bsf PORTB, 2 / on for 3 6 9 12 ETC, xiggh decfsz TEMP1,1 F goto Xiggh NOP 20 NOP NOP RETURN BEEP 25 DS2 movf TEMP1, W movwf TEMP BSF PORTB1 / WAS1 SD2 decfsz TEMP, F goto SD2 BCF PORTB, 1 movf TEMP1, W movwf TEMP SD3 decfsz TEMP, F goto SD3 DECFSZ TIMER1, F GOTO DS2 return WAITD CLRF TIMER1 CALL WAITDD BTFSC TEMP1, 3 BSF TIMER1,0 CALL WAITDD 168 BTFSC TEMP1, 3 BSF TIMER1,1 CALL WAITDD BTFSC TEMP1,3 BSF TIMER1,2 168 CALL WAITLD BTFSC TEMP1,3 BSF TIMER1,3 CALL WAITDD BTFSC TEMP 1,3 BSF TIMER1,4 CALL WAITDD BTFSC TEMP1, 3 F 10 BSF TIMER1,5 CALL WAITDD BTFSC TEMP1,3 BSF TIMER1,6 CALL WAITDD 15 BTFSC TEMP1, 3 BSF TIMER1,7 F RETURN 20 WAITDD CLRF TEMP1 SI incf TEMP1, F NOP 25 NOP NOP NOP NOP NOP BTFSC PORTA ', 0 GOTO SI Ll nop nop nop nop INCFSZ TEMP1, F GOTO LLl GOTO HHl LLl BTFSS PORTA, 0 GOTO Ll HHl RETURN ASC2 MOVLW 20h CALL TXDATA MOVLW .48 MOVWF ASCII RPT4 INCF DIGIT1 DECFSZ ASCII, F GOTO RPT4 MOVLW .48 MOVWF ASCII MOVF DIGIT1, W cali TXDATA RPT5 INCF DIGIT2 DECFSZ ASCIIF GOTO RPT5 MOVLW .48 MOVWF ASCII MOVF DIGIT2, W cali TXDATA RPT6 INCF DIGIT3 DECFSZ ASCII, F GOTO RPT6 MOVF DIGIT3, W cali TXDATA MOVLW 20h ___w_a_tf_ CALL TXDATA RETURN 5 ASC MOVLW .48 MOVWF ASCII F 10 RPT1 INCF DIGIT1 DECFSZ ASCII, F GOTO RPT1 MOVLW .48 MOVWF ASCII 15 MOVF DIGIT1, W cali SendChar RPT2 INCF DIGIT2 F DECFSZ ASCII, F GOTO RPT2 20 MOVLW .48 MOVWF ASCII MOVF DIGIT2, W cali SendChar RPT3 INCF DIGIT3 25 DECFSZ ASCII, F GOTO RPT3 MOVF DIGIT3, W cali SendChar RETURN ASCI MOVWF DIGIT1 MOVF DIGIT1, W f 10 cali SendChar RETURN CONVERT 15 CLRF DIGIT1 CLRF DIGIT2 F CLRF DIGIT3 MOVWF VALUE 20 CALL DI CALL D2 CALL D3 RETURN 25 DI movlw .100 subwf VALUE, W BTFSS STATUS, C RETLW 0 MOVWF VALUÉ / BALANCE IN VALUE TO INCF DIGIT1, F GOTO DI D2 moviw .10 subwf VALUE, W BTFSS STATUS, CF 10 RETLW 0 MOVWF VALUÉ / BALANCE IN VALUE A INCF DIGIT2, F GOTO D2 D3 movlw .1 15 subwf VALUE, W BTFSS STATUS, C RENTLW 0 F MOVWF VALUÉ / BALANCE IN VALUE TO INCF DIGIT3, F 20 GOTO D3 CLRLCD return 25 SetupDelay return F SendChar 5 return SendCmd return F 10 BusyCheck return LCDinit 15 SLP return) END a_d-l ---- _ TABLE 2 / T140798 current project ADD START PULSE TO DECREASE TO 48 uS INCREASE START PULSE TO 200uS SEND ENTRY TO BE CENTER FRAME 100BAUDIOS list p = 12C509, f = inhxdm IDLOCS OOOOH CONFIG OOOEH OOOEH for int 4 meg ose ****** 00ODH FOR EXT 4 MEG XTAL 001EH FOR MCLR ON EXT PIN 4 + INT OSC / 001DH FOR MCLR ON EXT PIN 4 TO VSS + EXT XTAL / OOOCH FOR EXT 32KHZ IDLOCS OOOOH STATUS = 3 OSCCAL = 5 / 12C509 INDIR = 0 FSR = 4 PORTA = 6 / WAS 5 PORTB = 6 TRISA = 85h TRISB = 86h OPTN-Blh TMIRO = 1 VALID = 08h, • code to send F 10 VALO = 09h, • delay / repeat DIGIT5 = 10h DIGIT6 = llh DIGIT7 = 12h 15 DIGIT8 = 13h DIGIT2 = 14h DIGIT3 = 15h F DIGIT4 = 16h DIGIT1 = 17h 20 DIGIT9 = 18h DIGIT10 = 19h DIGIT11 = lAh DIGIT12 = lBh DIGIT13 = = ICh 25 DIGIT14 = = lDh ......., - .__- ^ -__ DIGIT15 = lEh VAL4 = lFh SPARE = OFh TERRY2 = OEh VAL5 = ODh VAL2 = OCh TERRY = OBh VAL3 = OAh ORG (; MOVWF OSCCAL start ORG 0 MOVWF OSCCAL / SETUP PORT DDR MOVLW 3EH TRIS PORTA / / ALL TICKETS EXCEPT FOR 10 1 BCF PORTA, 0 MOVLW 004FH / WAS OF4F DEFAULT IS SLOW AS 00ADH FOR NOT .-- i -.-_ - - - Lr,.

AWAKE OPTION / UP IN CHANGE OF PATA BTFSS PORTA .2 5 / GOTO CHECK BSF STATUS, 5 / FIXED SET CALL SET UP BCF STATUS .5 F 10 curl INCFSZ DIGIT8,1 GOTO OOT 15 INCFSZ DIGIT7, 1 GOTO OOT INCFSZ DIGIT6,1 F GOTO OOT INCFSZ DIGIT5,1 20 GOTO OOT OOT NOP BTFSS TERRY, 7 / YES 0 GO TO X GOTO OUTA 25 MOVLW 14h __.

MOVWF TERRY OUTA BTFSS TERRY, 6 GOTO OUTB MOVLW 14h MOVWF TERRY OUTB BTIFSS TERRY, 5 GOTO OUTC MOVLW 14h MOVWF TERRY OUTC BTFSC TERRY GOTO ALLOK BTIFSC TERRY, 6 GOTO ALLOK BUSC TERRY, 5 GOTO ALLOK BTFSC TERRY, 4 GOTO ALLOK / BTFSC TERRY, 3 GOTO ALLOK MOVLW 14h MOVWF TERRY ALLOK -áa ****** WAS HERE BTFSS PORTA, 2 GOTO CHECK ****** TQ HERE AFTER CLRWDT F 10 BTFSS PORTA, 2. ******** GOTO NEXT CLRF PORTA PSD 15 BSF STATUS, 5 / FIXED ADJUSTMENT CALL CSUM F BCF STATUS, 5. ***** VERIFY SUM 20 FOR DATA MOVLW .48 SUBWF DIGIT15.W MOVWF VALÍ 25 BTFSC VAL1,0 GOTO TX1 BTFSC VALÍ, 1 GOTO TX1 BUSC VALÍ, 2 / GOTO TX1 BTFSC VALÍ, 3 GOTO TX1 BTFSC VALÍ, 4 GOTO TX1 / BTFSC VALÍ, 5 GOTO TX1 BTFSC VALÍ , 6 GOTO TX1 BTFSC VALÍ, 7 / GOTO TX1 GOTO TX2 MOVLW 20h / was 20 and 11 MOVWF VAL5 movlw 20h movwf VALÍ CALL pulse4 MOVLW 20h MOVWF VAL5 MOVLW 20h / FUE 20 E HOME MOVWF VALÍ CALL press4 F 10 movlw 20h movwf VALÍ cali pulse4 MOVLW .04 / went 04 TX IN TIME 15 MOVWF VAL5 movf DIGIT1.0 / DIGIT1 F MOVWF VALI cali pulse movf DIGIT2,0, -period movwf VALI cali pulse 25 movf DIGIT3,0; + - 1 i - - "- -" -. .. .., .. J --- «a movwf VALI cali press F movf DIGIT4,0, -inc in the change movwf VALI cali pulse movf DIGIT5,0 / inc in tx 1 movwf VALI F 10 cali pulse movf DIGIT6,0 / inc on tx 2 movwf VALI cali press 15 movt DIGIT7,0 / inc on tx 3 movwf VALÍ F cali pulse 20 movf DIGIT8,0 movwf VALI cali pulse movig DIGIT9,0 25 movwf VALI cali pulse movf DIGIT10 .0 movwf VALI cali press' movig DIGIT11,, 0 movwf VALI cali pulse movig DIGIT12,, 0 movwf VALI cali press movf DIGIT13,, 0 movwf VALI cali pulse movf DIGIT14,, 0 movwf VALI cali pulse movig DIGIT15, 0 movwf VALI cali press movlw .80 movwf VALI cali pulse movf TERRY2, 0 movwf VALI cali pulse nop nop nop nop nop nop nop nop nop nop cali pulse5 / SLEEPING MODE AFTER THE CODE TX2 clrwdt MOVF PORTA, 0 MOVWF VALÍ sleep nop MOVF VALÍ, 0 MOVWF PORTA clrwdt RETURN F 10 ZERO NOP MOVWF VALI BTFSS VALÍ, 7 / SI 0 ADVANCE TO X GOTO OUTX 15 CLRF VALÍ INCF VAL1,1 OUTX BTFSS VALÍ, 6 F GOTO OUTX2 CLRF VALÍ 20 INCF VAL1,1 OUTX2 RETURN 25 / PROC FOR OUTPUT CODE pulse F BTFSS VALÍ .0 CALL pulse3 BTFSC VAL1,0 cali pulse2 BTFSS VALÍ, 1 CALL pulse3 F 10 BTFSC VAL1,1 cali pulse2 BTFSS VALÍ, 2 156 CALL pulse3 15 BTFSC VALÍ, 2 cali pulse2 F BTFSS VALÍ, 3 CALL pulse3 20 BTFSC VALÍ, 3 cali pulse2 BTFSS VALÍ, 4 CALL pulse3 25 BTFSC VALÍ, 4 __a_is_J __- cali pulse2 BTFSS VALÍ, 5 CALL pulse3 BTFSC VALÍ, 5 cali pulse2 BTFSS VALÍ, 6 CALL pulse3 BTFSC VALÍ, 6 cali pulse2 BTFSS VALÍ, 7 CALL pulse5 BTFSC VALÍ, 7 cali pulse5 CALL pulsed / return pulsed clrwdt MOVLW .20 / REACH TEST BUT STILL MUST BE GREATER DE 4 MOVF VAL5, W movwf VALUE bsf PORTABLE, 0 / ON for 3 6 9 12 ETC. diiiq NOP NOP NOP / NEW ENERGY VERIFICATION * ********* NOP decfsz VALO, 1 goto diiig F 10 BCF PORTA.0, -cycle 46 off nop nop nop nop 15 nop nop nop F nop nop 20 nop nop nop nop 25 nop nop nop nop nop nop RETURN press2 clrwdt MOVF VAL5, W wovwf VALUE bsf PORTABLE, 0 / ON for 3 6 9 12 ETC. dighh NOP NOP NOP / ALSO NEW ENERGY VERIFICATION *** NOP decfsz VALO, 1 goto dighh BCF PORTA, 0, -cycle to 46 off NOP NOP NOP NOP NOP NOP nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop F RETURN press5 clrwdt MOVLW .10 / MOVF REACH TEST VAL5, W F 10 movwf VALO bsf PORTABLE, 0 / ON for 3 6 9 12 ETC ". Digg decfsz VALO, l goto digg BCF PORTA.0 / cycle 46 off 15 RETURN press3 clrwdt MOVF VAL5, W 20 movwf VALUE bsf PORTABLE, 0 / ON for 3 6 9 12 ETC. digpp decfsz VALO, l goto digpp BCF PORTA .0, -cycle 46 off 25 nop nop nop nop nop nop RETURN press4 clrwdt movwf VALO NOP NOP / 12 CYCLES bsf PORTA, 0, -power for 46us digph decfsz VALUE, 1 goto digph BCF PORTA, 0, -cycle 46 off digf decfsz VALÍ, 1 goto digf NOP RETURN ; ***** MOVED HERE VERIFY / METER MODE MOVLW .48 SUBWF DIGIT15, W MOVWF VALÍ BTFSC VALÍ,, 7 GOTO TT1 10 BTFSC VALÍ,, 6 GOTO TT1 BTFSC VALÍ, 5 GOTO TT1 BTFSC VALÍ, 4 15 GOTO TT1 BTFSC VALÍ, 3 GOTO TT1 BTFSC VALÍ, 2 GOTO TT1 20 BTFSC VALÍ, 1 GOTO TT1 BTFSC VALÍ, 0 GOTO TT3 25 GOTO TT2 TT2 BTFSC HOLDER 2 / IS HOLDER, 1 GOTO KK1 F BTFSC SPARE, 0 / BTFSC = BIT = 0 AFTER JUMPED INSTRUCTION GOTO KK1 MOVLW Olh MOVWF SPARE INCF DIGIT3,1 INCF DIGIT4.1 / IS THE DIGIT04 F 10 KK1 BTFSS PORTABLE .2 / ES PORTA, 1 GOTO KK2 BTFSS SPARE, 0 15 GOTO KK2 CLRF SPARE DECF DIGIT3,1 KK2 20 GOTO NEXT TT3 BTFSC PORTA, 2 GOTO NEXT MOVLW lFh 25 MOVWF TERRY MOVF VAL4, W SUBWF DIGIT4, W F MOVWF VALÍ BTFSC VALÍ, 7 GOTO TTL BTFSC VALÍ, 6 GOTO TTL BTFSC VALÍ, 5 GOTO TTL 10 BTFSC VALÍ, 4 GOTO TTL BTFSC VALÍ, 3 GOTO TTL BTFSC VALÍ .2 15 GOTO TTl STFSC VALÍ .1 GOTO TTl F BTFSC VALÍ, 0 GOTO TTL 20 MOVLW 16h MOVWF TERRY CLRF VAL4 25 TTL BTFSC PORTA.2; I0 IS NOW LOW TO ESTABLISH DATA f ***** PROGRAM MODE OFF ***** GOTO NEXT CLRF VALÍ WSB BTFSS PORTA.2 GOTO WSB F 10 CLRWDT / we must now wait for 4500 us MOVLW .20 FUE 10-25-23-45 MOVWF VAL3 15 PM1 MOVLW .23 / 23 / reusable values are vali val5 val2 val3 MOVWF VAL2 PM2 CLRWDT DECFSZ VAL2 , 1 20 GOTO PM2 DECFSZ VAL3, 1 GOTO PM1 MOVLW .46 / 45 25 MOVLW VAL3 BU MOVLW .46 / the reusable values are MOVWF VAL2 valí val5 val3 B12 CLRWDT DECFSZ VAL2, 1 GOTO B12 DECFSZ VAL3, 1 GOTO Bll BTFSC PORTA, 2 BSF VALÍ, 0 BCF PORTA, 0 MOVLW .46 MOVWF VAL3 B21 MOVLW .46 / the reusable values are MOVWF VAL2 vali val5 val2 val3 322 CLRWDT DECFSZ VAL2, 1 GOTO B22 DECFSZ VAL3, 1 GOTO B21 BTFSC PORTA, 2 BSF VALÍ, 1 ; BSF PORTA, 0 MOVLW .46 MOVWF VAL3 F B31 MOVLW .46, -the reusable values are MOVWF VAL2 vali val5 val2 val3 5 B32 CLRWDT DECFSZ VAL2, 1 GOTO B32 DECFSZ VAL3, 1 GOTO B31 F 10 BTFSC PORTA, 2 BSF VALÍ, 2 BCF PORTA, 0 15 MOVLW .46 MOVWF VAL3 B41 MOVLW .46 / the reusable values are F MOVWF VAL2 vali val5 val2 val3 B42 CLRWDT 20 DECFSZ VAL2, 1 GOTO B42 DECFSZ VAL3, 1 GOTO B41 BTFSC PORTA, 2 25 BFS VALÍ, 3 t-a *. "- * ---- BFS PORTA, 0 F MOVLW .46 MOVWF VAL3 5 B51 MOVLW .46, -the reusable values are MOVWF VAL2 valí val5 val2 val3 B52 CLRWDT DECFSZ VAL2, 1 GOTO B52 F 10 DECFSZ VAL3, 1 GOTO B51 BTFSC PORTA, 2 BSF VALÍ, 4 15 BCF PORTA, 0 MOVLW .46 MOVWF VAL3 B61 MOVLW .46 / the reusable values are 20 MOVWF VAL2 val val5 val3 B62 CLRWDT DECFSZ VAL2, 1 GOTO B62 DECFSZ VAL3, 1 25 GOTO B61 BTFSC PORTA, 2 BSF VALÍ, 5 F BSF PORTA, 0 MOVLW .46 MOVWF VAL3 B71 MOVLW .46 / the reusable values are MOVWF VAL2 val val5 val2 val3 10 B72 CLRWDT DECFSZ VAL2, 1 GOTO B72 DECFSZ VAL3, 1 GOTO B71 15 BTFSC PORTA, 2 BSF VALÍ .6 F BCF PORTA, 0 20 MOVLW .46 MOVWF VAL3 B81 MOVLW .46 / the reusable values are MOVWF VAL2 val val5 val2 val3 B82 CLRWDT 25 DECFSZ VAL2 ____ a_alt _ - _ at «" ._ "" ._..... "_, -.

GOTO B82 DECFSZ VAL3, 1 GOTO B81 BTFSC PORTA, 2 BSF VAL 1,7 BCF PORTA, 0 INCF TERRY, 1 BTFSC TERRY. 4 GOTO SSM MOVLW 14h MOVWF TERRY SSM MOVF TERRY, 0 MOVWF FSR MOVF VALÍ, 0 MOVWF INDIR INCF TERRY, 1 CLRF DIGIT5 CLRF DIGIT6 CLRF DIGIT7 CLRF DIGIT8 MOVF VALÍ, 0 MOVWF DIGIT4 MOVLW .48; SUBWF DIGIT5, W MOVWF VALÍ BTFSC VALÍ, 0 GOTO TX1 BTFSC VALÍ, 1; GOTO TX1 BTFSC VALÍ, 2 GOTO TX1 BTFSC VALÍ, 3 GOTO TX1 / BTFSC VALÍ, 4 GOTO TX1 BTFSC VALÍ, 5 GOTO TX1 BTFSC VALI, 6 / GOTO TX1 BTFSC VALI, 7 GOTO TX1 GOTO TX2 rTXl GOTO NEXT f ***** pifj ORG 20OH 5 RESET MOVF DIGIT2,0; 3, 4, 5 MOVWF VAL5 10 GOTO OUT3 / NO SETUP MODE **** REMOVE ***** BTFSC VAL5, 7 GOTO OUT3 BTFSC VAL5, 6 GOTO OUT3 BTFSS VAL5, 5 GOTO OUT3 F BTFSS VAL5, 4 GOTO OUT3 20 BTFSC VAL5, 3 GOTO OUT1C BTFSC VAL5, 2 GOTO OUT1C 25 BTFSC VAL5, 1 ^ »*" ** "- '4" trr «» * * > - GOTO OUT1C BTFSC VAL5, 0 GOTO OUT1C MOVLW 004FH / was 004FH but without extractions OPTION GOTO OUT4 OUT1C BTFSC VAL5, 3 10 GOTO OUT1B BTFSC VAL5, 2 GOTO OUT1B BTFSC VAL5, 1 15 GOTO OUT1B BTFSS VAL5, 0 GOTO OUT1B MOVLW 004EH; OPTION 20 GOTO OUT4 OUT1B BTFSC VAL5,3 GOTO OUT1A 25 BTFSC VAL5, 2 ,. < * SIÉM > M-faith-S__.

GOTO OUT1A BTFSS VAL5, 1 GOTO OUT1A BTFSC VAL5, 0 GOTO OUT1A MOVLW 004DH; OPTION GOTO 0UT4 OUT1A BTFSC VAL5, 3 GOTO OUT1 BTFSC VAL5, 2 GOTO OUT1 BTFSS VAL5, 1 GOTO OUT1 BTFSS VAL5, 0 GOTO OUT1 MOVLW 004CH; 16 OPTION GOTO 0UT4 OUTl BTFSC VAL5, 3 GOTO OUT2 BTFSS VAL5, 2 GOTO OUT2 BTFSC VAL5, 1 GOTO OUT2 SEARCH VAL 5, OR GOTO OUT2 MOVLW 004BH; 16 OPTION GOTO OUT4 OUT2 BTFSC VAL5, 3 GOTO OUT3 BTFSS VAL5, 2 GOTO OUT3 BTFSC VAL5, 1 GOTO OUT3 BTFSS VAL5, 0 GOTO OUT3 MOVLW 004AH; 32 OPTION GOTO OUT4 OUT3 BTFSC VAL5, 3 GOTO OUT5 BTFSS VAL5, 2 GOTO OUT5 BTFSS VAL5.1 GOTO OUT5 BTFSC VAL5.0 GOTO OUT5 MOVLW 0049H / FUE 0049H OPTION GOTO 0UT4 OUT5 / RESET TAG MOVLW 004DH / OE 2SEC OB = 13FAST 000DH FOR 1 PER SECOND AND OOOFH FOR SLOW OPTION MOVLW 50 / WAS 50 OA 2 SEC OD = 13 FAST OBH FOR 1 PER SECOND AND 09H FOR SLOW MOVWF DIGIT2 / SPEED MOVLW .50 MOVWF DIGIT 3 / CONM MOVLW .00 MOVWF DIGIT4 / COUNTER MOVLW .00 MOVWF DIGIT5 / AGE MDVLW .00 MOVWF DIGIT6 / MOVLW .00 MOVWF DIGIT7 / MOVLW .00 MOVWF DIGIT8 / MOVLW .48 MOVWF DiGITl / DATA 1 MOVLW .48 MOVWF DIGIT9 / data 2 MOVLW .48 MOVWF DIGIT10 MOVLW .48 MOVWF DIGIT11 MOVLW .48 MOVWF DIGIT12 MOVLW .48 MOVWF DIGIT13 MOVLW .48 MOVWF DIGIT14 MOVLW .65 MOVWF DIGIT15 MOVLW .80 MOVWF DIGIT16 MOVLW 14h MOVWF TERRY 0UT4 INCFSZ DIGIT8,1 GOTO OOTA INCFSZ DIGIT7,1 GOTO OOTA INCM DIGIT6,1 GOTO OOTA INCFSZ DIGIT5,1 GOTO OOTA OOTA RETURN CSUM MOVF DIGIT1,, 0 ADDWF DIGIT2,, 0 ADDWF DIGIT3,, 0 ADDWF DIGIT4,, 0 ADDWF DIGIT5,, 0 F "T3 st? N_oxa_ s? _aax aM? OW o'stxioia áMaav ot O't'txioia aMaav o'etxioia aMaav o'stxioia aMaav o'ttxioia aMaav o'otxioia aMaav o'6x? o? a aMaav o'ßxioia aMaav o '? Xioia aMaav o'9x? o? a aMaav - _tt

Claims (27)

1. An electronic card, which includes: a processor means programmed to provide a modulation control signal which includes unique identification data which identifies at least the card, - and transmitter circuitry connected to the processor means and to an antenna for transmission of the unique identification data, the transmitting circuitry is energized by the modulation control signal.

2. The electronic card, as described in claim 1, wherein the transmitting circuit is energized exclusively by the modulation control signal of the processor means.

3. The electronic card, as described in claim 1 or 2, in which the transmitting circuit includes passive components and an oscillation circuit that defines the transistor driven directly by the processor means, the transistor in combination with the passive components form a part integral of the transmitting circuit which is energized by the modulation signal. ....... _ f * - M

4. The electronic card, as described in any of the preceding claims, wherein the processor means is configured to provide the modulation control signal with a first part followed by a In the second part, the first part includes at least one activation pulse of duration such that it provides sufficient energy to the transmitting circuitry at least partially to stabilize it for transmission of the second part which includes data defined in a plurality of pulses which they are of a substantially shorter duration.

5. The electronic card, as described in claim 4, wherein the first part of the modulation control signal includes a plurality of pulses of 15 activation which, in combination, provide an identification signal to the card receiver to receive a transmission from the electronic card.

6. The electronic card, as described in claim 4 or claim 5, wherein each pulse of the second part of the modulation signal includes a start portion to identify the start of a bit and a portion of data to identify a state of the data bits, the data portion duration selectively defines a state a-_ activated and inactivated of the bit under the control of the processor medium.

7. The electronic card, as described in claim 6, wherein the activation state of the bit is defined by a shorter data portion during which the oscillator circuit is inactivated and a bit inactivation state is defined by a portion of larger data during which the oscillator circuit is inactivated.

8. The electronic card, as described in any of the preceding claims, wherein the processor means is a microcontroller which includes an internal RC oscillator on which the modulation control signal is dependent and the microcontroller is placed to introduce a inactivation or sleeper mode between data transmissions so that energy consumption is reduced.

9. An identification system, including: a plurality of electronic cards, each card includes: a processor means programmed to provide a modulation control signal which includes unique identification data which at least identify the card, - and circuitry transmitter connected to the processor means and the antenna for transmission of the unique identification data, the transmitter circuitry is substantially energized by the modulation control signal, and at least one electronic card receiver configured to receive a transmission from the card. .

10. The identification system, as described in claim 9, wherein the electronic card transmitting circuit is energized exclusively by the signal of modulation control of the processor means.

11. The identification system, as described in claim 9 or claim 10, wherein the transmitting circuit includes passive components and a transistor 15 driven directly by the processor means, and the transistor in combination with the passive components form an integral part of the transmitter circuitry which is energized by the modulation control signal.

12. The identification system, as described in any of the preceding claims 9 to 11, inclusive, wherein the processor means is configured to provide the modulation control signal with a first part followed by a second part. , the first part includes at least one pulse 25 of activation of a duration such as to provide energy LJ. sufficient to the transmitting circuitry to stabilize at least partially for the transmission of the second part which includes data defined in a plurality of pulses which are of a substantially shorter duration.

13. The identification system, as described in claim 12, wherein the first part of the modulation control signal includes a plurality of activation pulses which, in combination, provide an identification signal for a signal detection means. of the electronic card receiver to receive a transmission from the electronic card.

14. The identification system, as described in claim 12 or claim 13, wherein each pulse of the second part of the modulation signal includes a start portion to identify the start of a bit and a portion of data to identify the state of the data bits, the duration of the data portion selectively defines a state of activation and inactivation of the bits under the control of the processor means.

15. The identification system, as described in claim 14, wherein the activation bit is defined by a shorter data portion during which the transmitting circuitry is inactivated, and the inactivation bit is defined by a portion of data largest during which the transmitter circuitry becomes inactive.

16. A method "for communicating data from an electronic card, the method includes: transmitting a modulation control signal which includes unique identification data identifying the card, and transmitting circuit for activating the card with a 10 modulation control signal which substantially energizes the transmitter circuitry.

17. The method as described in claim 16, wherein the modulation control signal 15 exclusively energizes the transmitter circuitry.

18. The method as recited in claim 16 or claim 17, which includes selectively modulating a fundamental frequency of an oscillator when transmitting data, and inactivating the oscillator when the data is not transmitted.

19. The method as described in any of the preceding claims 16 to 18, inclusive, wherein the modulation control signal includes a first part followed For a second part, the first part includes at least one activation pulse of a duration such that it provides sufficient energy to the transmitting circuit to stabilize at least partially the same for transmission of the second part which includes data defined in a plurality. of pulses, which are of substantially shorter duration.

20. The method as described in claim 19, wherein the first part of the modulation control signal includes a plurality of pulses of 10 activation which, in combination, provide an identification signal to a card receiver to receive a transmission from the electronic card.

21. The method as described in claim 19 or claim 20, wherein each pulse of the second part of the modulation signal includes a start portion to identify the start of a bit and a portion of data for aBk to identify a state of the data bits, - the duration of the data portion selectively defines an activation state and 20 inactivation of the bits under the control of the processor medium.

22. The method as described in claim 21, wherein the activation bit is defined by a shorter data portion during which the signal of If the modulation control is inactivated, the inactivation bit is defined by a larger data portion during which the modulation control signal is inactivated.

23. The method as described in any of the preceding claims 16 to 22, inclusive, wherein the processor means is a microcontroller which includes an internal RC oscillator in which the modulation control signal is dependent and the microcontroller is arranged to Enter an inactivation or sleeper mode between the data transmissions so that the power consumption is reduced.

24. A new electronic card, substantially as described and illustrated here.

25. A new system, substantially as described and illustrated here.

26. A new method for reducing energy consumption in an electronic card, substantially as described and illustrated here.

27. A new receiver, substantially as described and illustrated here.