NO904858L - PROCEDURE FOR FAST RECEIVER SYNCHRONIZATION UNDER THE USE OF ENFUL CORRECTIVE CODING. - Google Patents

PROCEDURE FOR FAST RECEIVER SYNCHRONIZATION UNDER THE USE OF ENFUL CORRECTIVE CODING.

Info

Publication number
NO904858L
NO904858L NO90904858A NO904858A NO904858L NO 904858 L NO904858 L NO 904858L NO 90904858 A NO90904858 A NO 90904858A NO 904858 A NO904858 A NO 904858A NO 904858 L NO904858 L NO 904858L
Authority
NO
Norway
Prior art keywords
fec decoder
synchronization
switched
enful
procedure
Prior art date
Application number
NO90904858A
Other languages
Norwegian (no)
Other versions
NO904858D0 (en
Inventor
Karl-Josef Friederichs
Guenter Rockenbach
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of NO904858D0 publication Critical patent/NO904858D0/en
Publication of NO904858L publication Critical patent/NO904858L/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/33—Synchronisation based on error coding or decoding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0047—Decoding adapted to other signal detection operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/10—Arrangements for initial synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

Det foreslås en fremgangsmåte til rask rammesynkronisering på mottagningssiden av digitale transmisjonssystemer og som muliggjør en rask synkronisering også ved høye bitfeilrater. Det er for dette formål sørget for at datasignalene tas ut på utgangen av en for to driftsmoder utført FEC-dekoder (l) og leveres til en synkroniserende krets (2) for FEC-dekode- ren (1). I den første bedriftsmode er korreksjonsevnen til FEC-dekoderen (1) koblet ut og datane blir koblet transpa- rent videre inntil deteksjon av minst en del av et rammekodeord for oppnåelse av en foreløpig startsynkronisering. Deretter blir korreksjonsevnen til FEC-dekoderen (1) koblet inn og resten av synkroniseringsforløpet understøttet ved FEC.A method of rapid frame synchronization is proposed on the receiving side of digital transmission systems and enables rapid synchronization even at high bit error rates. For this purpose, the data signals are taken out at the output of a FEC decoder (1) executed for two operating modes and supplied to a synchronizing circuit (2) for the FEC decoder (1). In the first operating mode, the correction capability of the FEC decoder (1) is switched off and the data is switched on transparently until detection of at least part of a frame code word for obtaining a preliminary start synchronization. Then the correction capability of the FEC decoder (1) is switched on and the rest of the synchronization process is supported by the FEC.

NO90904858A 1989-11-08 1990-11-08 PROCEDURE FOR FAST RECEIVER SYNCHRONIZATION UNDER THE USE OF ENFUL CORRECTIVE CODING. NO904858L (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP89120718A EP0426894A1 (en) 1989-11-08 1989-11-08 Method for fast synchronisation with the utilisation of error correcting coding

Publications (2)

Publication Number Publication Date
NO904858D0 NO904858D0 (en) 1990-11-08
NO904858L true NO904858L (en) 1991-05-10

Family

ID=8202110

Family Applications (1)

Application Number Title Priority Date Filing Date
NO90904858A NO904858L (en) 1989-11-08 1990-11-08 PROCEDURE FOR FAST RECEIVER SYNCHRONIZATION UNDER THE USE OF ENFUL CORRECTIVE CODING.

Country Status (6)

Country Link
EP (1) EP0426894A1 (en)
AU (1) AU625770B2 (en)
BR (1) BR9005624A (en)
FI (1) FI905519A0 (en)
MX (1) MX172593B (en)
NO (1) NO904858L (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2917177B2 (en) * 1993-06-21 1999-07-12 沖電気工業株式会社 Error detection method, apparatus and identification method
JP2768621B2 (en) * 1993-06-25 1998-06-25 沖電気工業株式会社 Decoding apparatus for convolutional code transmitted in a distributed manner
US5570370A (en) * 1995-04-28 1996-10-29 Industrial Technology Research Institute Frame timing acquisition method and system for cordless TDMA systems
FR2760302B1 (en) * 1997-03-03 2000-08-04 Alsthom Cge Alcatel METHOD AND DEVICE FOR TRANSMITTING DATA FRAMES
GB2371952A (en) * 2001-01-31 2002-08-07 Inmarsat Ltd Frame synchronisation in a communication system
JP2003060631A (en) * 2001-08-15 2003-02-28 Fujitsu Ltd Frame synchronizing device and method therefor
US11601216B1 (en) * 2021-11-30 2023-03-07 L3Harris Technologies, Inc. Alignment detection by full and partial FEC decoding

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3837920A (en) * 1971-07-09 1974-09-24 Mallory & Co Inc P R A battery containing a solid electrolyte having cationic defects

Also Published As

Publication number Publication date
AU625770B2 (en) 1992-07-16
AU6590390A (en) 1991-05-16
MX172593B (en) 1994-03-01
BR9005624A (en) 1991-09-17
NO904858D0 (en) 1990-11-08
EP0426894A1 (en) 1991-05-15
FI905519A0 (en) 1990-11-07

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