NO300790B1 - Innretning for å danne et grensesnitt mellom en hovedprosessorbuss og en periferibuss - Google Patents
Innretning for å danne et grensesnitt mellom en hovedprosessorbuss og en periferibuss Download PDFInfo
- Publication number
- NO300790B1 NO300790B1 NO911511A NO911511A NO300790B1 NO 300790 B1 NO300790 B1 NO 300790B1 NO 911511 A NO911511 A NO 911511A NO 911511 A NO911511 A NO 911511A NO 300790 B1 NO300790 B1 NO 300790B1
- Authority
- NO
- Norway
- Prior art keywords
- bus
- main processor
- data
- peripheral
- address
- Prior art date
Links
- 230000002093 peripheral effect Effects 0.000 title claims abstract description 119
- 230000009977 dual effect Effects 0.000 claims abstract description 15
- 239000000872 buffer Substances 0.000 claims description 20
- 238000012546 transfer Methods 0.000 claims description 16
- 239000013598 vector Substances 0.000 claims description 6
- 238000013481 data capture Methods 0.000 abstract description 29
- 230000005540 biological transmission Effects 0.000 abstract 1
- 230000006870 function Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000013519 translation Methods 0.000 description 2
- 238000007792 addition Methods 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US39576789A | 1989-08-18 | 1989-08-18 | |
| PCT/US1990/004568 WO1991003022A1 (fr) | 1989-08-18 | 1990-08-13 | Bus e/s peripherique et interface de bus programmable pour acquisition de donnees informatisees |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| NO911511L NO911511L (no) | 1991-04-17 |
| NO911511D0 NO911511D0 (no) | 1991-04-17 |
| NO300790B1 true NO300790B1 (no) | 1997-07-21 |
Family
ID=23564415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| NO911511A NO300790B1 (no) | 1989-08-18 | 1991-04-17 | Innretning for å danne et grensesnitt mellom en hovedprosessorbuss og en periferibuss |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP0439594B1 (fr) |
| JP (1) | JPH07504050A (fr) |
| AU (1) | AU6288090A (fr) |
| CA (1) | CA2039150A1 (fr) |
| DE (1) | DE69016991D1 (fr) |
| NO (1) | NO300790B1 (fr) |
| WO (1) | WO1991003022A1 (fr) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0600121A1 (fr) * | 1992-12-02 | 1994-06-08 | Siemens Aktiengesellschaft | Microprocesseur |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4698753A (en) * | 1982-11-09 | 1987-10-06 | Texas Instruments Incorporated | Multiprocessor interface device |
| IT1161467B (it) * | 1983-01-21 | 1987-03-18 | Cselt Centro Studi Lab Telecom | Interfaccia di tipo parallelo per la gestione del colloquio tra un bus asincrono e un bus sincrono collegato a piu terminali dotati ognuno di un proprio segnale di sincronizzazione |
| EP0251686B1 (fr) * | 1986-06-30 | 1994-01-19 | Encore Computer Corporation | Méthode et appareil de partage d'information entre plusieurs unités de traitement |
-
1990
- 1990-08-13 JP JP2512249A patent/JPH07504050A/ja active Pending
- 1990-08-13 DE DE69016991T patent/DE69016991D1/de not_active Expired - Lifetime
- 1990-08-13 AU AU62880/90A patent/AU6288090A/en not_active Abandoned
- 1990-08-13 EP EP90912827A patent/EP0439594B1/fr not_active Expired - Lifetime
- 1990-08-13 WO PCT/US1990/004568 patent/WO1991003022A1/fr active IP Right Grant
- 1990-08-13 CA CA002039150A patent/CA2039150A1/fr not_active Abandoned
-
1991
- 1991-04-17 NO NO911511A patent/NO300790B1/no not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| CA2039150A1 (fr) | 1991-02-19 |
| WO1991003022A1 (fr) | 1991-03-07 |
| NO911511L (no) | 1991-04-17 |
| AU6288090A (en) | 1991-04-03 |
| EP0439594A1 (fr) | 1991-08-07 |
| JPH07504050A (ja) | 1995-04-27 |
| NO911511D0 (no) | 1991-04-17 |
| EP0439594B1 (fr) | 1995-02-15 |
| DE69016991D1 (de) | 1995-03-23 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM1K | Lapsed by not paying the annual fees |
Free format text: LAPSED IN FEBRUARY 2002 |