NO911511L - Perifer i/o-buss og programmerbart bussgrensesnitt for datamskinell datafangst. - Google Patents

Perifer i/o-buss og programmerbart bussgrensesnitt for datamskinell datafangst.

Info

Publication number
NO911511L
NO911511L NO91911511A NO911511A NO911511L NO 911511 L NO911511 L NO 911511L NO 91911511 A NO91911511 A NO 91911511A NO 911511 A NO911511 A NO 911511A NO 911511 L NO911511 L NO 911511L
Authority
NO
Norway
Prior art keywords
bus
period
computer data
programmable
bus interface
Prior art date
Application number
NO91911511A
Other languages
English (en)
Other versions
NO911511D0 (no
NO300790B1 (no
Inventor
Guy Paul Vachon
Original Assignee
Schlumberger Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schlumberger Technology Corp filed Critical Schlumberger Technology Corp
Publication of NO911511D0 publication Critical patent/NO911511D0/no
Publication of NO911511L publication Critical patent/NO911511L/no
Publication of NO300790B1 publication Critical patent/NO300790B1/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
NO911511A 1989-08-18 1991-04-17 Innretning for å danne et grensesnitt mellom en hovedprosessorbuss og en periferibuss NO300790B1 (no)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US39576789A 1989-08-18 1989-08-18
PCT/US1990/004568 WO1991003022A1 (en) 1989-08-18 1990-08-13 Peripheral i/0 bus and programmable bus interface for computerized data acquisition

Publications (3)

Publication Number Publication Date
NO911511D0 NO911511D0 (no) 1991-04-17
NO911511L true NO911511L (no) 1991-04-17
NO300790B1 NO300790B1 (no) 1997-07-21

Family

ID=23564415

Family Applications (1)

Application Number Title Priority Date Filing Date
NO911511A NO300790B1 (no) 1989-08-18 1991-04-17 Innretning for å danne et grensesnitt mellom en hovedprosessorbuss og en periferibuss

Country Status (7)

Country Link
EP (1) EP0439594B1 (no)
JP (1) JPH07504050A (no)
AU (1) AU6288090A (no)
CA (1) CA2039150A1 (no)
DE (1) DE69016991D1 (no)
NO (1) NO300790B1 (no)
WO (1) WO1991003022A1 (no)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0600121A1 (de) * 1992-12-02 1994-06-08 Siemens Aktiengesellschaft Mikroprozessor

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4698753A (en) * 1982-11-09 1987-10-06 Texas Instruments Incorporated Multiprocessor interface device
IT1161467B (it) * 1983-01-21 1987-03-18 Cselt Centro Studi Lab Telecom Interfaccia di tipo parallelo per la gestione del colloquio tra un bus asincrono e un bus sincrono collegato a piu terminali dotati ognuno di un proprio segnale di sincronizzazione
EP0251686B1 (en) * 1986-06-30 1994-01-19 Encore Computer Corporation Method and apparatus for sharing information between a plurality of processing units

Also Published As

Publication number Publication date
EP0439594A1 (en) 1991-08-07
NO911511D0 (no) 1991-04-17
JPH07504050A (ja) 1995-04-27
AU6288090A (en) 1991-04-03
DE69016991D1 (de) 1995-03-23
NO300790B1 (no) 1997-07-21
CA2039150A1 (en) 1991-02-19
EP0439594B1 (en) 1995-02-15
WO1991003022A1 (en) 1991-03-07

Similar Documents

Publication Publication Date Title
DE69033042D1 (de) Datenverarbeitung
DE68909426D1 (de) Datenverarbeitung und -uebertragung.
DE68927911D1 (de) Datenverarbeitungssystem
ATE170996T1 (de) Fehlertolerantes datenverarbeitungssystem
DE69032384T2 (de) Datenpuffer
DE69021603D1 (de) Buszugriffsarbitrierung in digitalen Rechnern.
DE68929215T2 (de) Datenprozessor
DE69028362D1 (de) Verteiltes Datenverarbeitungssystem
DE68926783D1 (de) Paralleler datenprozessor
DE3684146D1 (de) Datenverarbeitungsverfahren und -geraet.
DE68928015D1 (de) Datenverarbeitungssystem
FI890630A (fi) Undersamplingsanordning foer samplad data.
KR910005167A (ko) 데이터 처리장치
DE68903693D1 (de) Einrichtung zur datenverarbeitung.
DE69032259D1 (de) Paralleldatenverarbeitungsanlage
DE69024994D1 (de) Datenverarbeitungsvorrichtung
KR910001578A (ko) 패턴 데이타 처리 방법
DE69019441D1 (de) Line Computer.
DE68924400D1 (de) Fliessbanddatenverarbeitungsvorrichtung.
DE68927540D1 (de) Datenverarbeitungsgerät
DE3786330D1 (de) Paralleldatenverarbeitungsvorrichtung und -verfahren.
DE3855605D1 (de) Datenverarbeitungsvorrichtung
DE68928254D1 (de) Datenverarbeitungsgerät
DE69031238D1 (de) Datenentpacker
DE69022773D1 (de) Datenverarbeitungsgerät.

Legal Events

Date Code Title Description
MM1K Lapsed by not paying the annual fees

Free format text: LAPSED IN FEBRUARY 2002