NL8800893A - Schrijf-leesschakeling. - Google Patents

Schrijf-leesschakeling. Download PDF

Info

Publication number
NL8800893A
NL8800893A NL8800893A NL8800893A NL8800893A NL 8800893 A NL8800893 A NL 8800893A NL 8800893 A NL8800893 A NL 8800893A NL 8800893 A NL8800893 A NL 8800893A NL 8800893 A NL8800893 A NL 8800893A
Authority
NL
Netherlands
Prior art keywords
transistor
data
write
read circuit
line
Prior art date
Application number
NL8800893A
Other languages
English (en)
Dutch (nl)
Original Assignee
Jenoptik Jena Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jenoptik Jena Gmbh filed Critical Jenoptik Jena Gmbh
Publication of NL8800893A publication Critical patent/NL8800893A/nl

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057—Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers

Landscapes

  • Static Random-Access Memory (AREA)
  • Dram (AREA)
NL8800893A 1987-04-16 1988-04-07 Schrijf-leesschakeling. NL8800893A (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DD30188187 1987-04-16
DD87301881A DD259935B5 (de) 1987-04-16 1987-04-16 Schreib - lese - schaltung

Publications (1)

Publication Number Publication Date
NL8800893A true NL8800893A (nl) 1988-11-16

Family

ID=5588329

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8800893A NL8800893A (nl) 1987-04-16 1988-04-07 Schrijf-leesschakeling.

Country Status (5)

Country Link
US (1) US4879684A (de)
JP (1) JPS6427091A (de)
DD (1) DD259935B5 (de)
DE (1) DE3810571A1 (de)
NL (1) NL8800893A (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343406A (en) * 1989-07-28 1994-08-30 Xilinx, Inc. Distributed memory architecture for a configurable logic array and method for using distributed memory
US5343428A (en) * 1992-10-05 1994-08-30 Motorola Inc. Memory having a latching BICMOS sense amplifier
US5815024A (en) * 1993-06-11 1998-09-29 Altera Corporation Look-up table using multi-level decode
US5438295A (en) * 1993-06-11 1995-08-01 Altera Corporation Look-up table using multi-level decode
DE19621769C1 (de) * 1996-05-30 1997-06-19 Siemens Ag Leseverstärker für Halbleiterspeicherzellen mit einer Einrichtung zur Kompensation von Schwellenspannungsunterschieden bei den Leseverstärkertransistoren

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4575823A (en) * 1982-08-17 1986-03-11 Westinghouse Electric Corp. Electrically alterable non-volatile memory

Also Published As

Publication number Publication date
DE3810571A1 (de) 1988-11-03
JPS6427091A (en) 1989-01-30
US4879684A (en) 1989-11-07
DD259935A1 (de) 1988-09-07
DD259935B5 (de) 1993-10-14

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Legal Events

Date Code Title Description
BV The patent application has lapsed