NL8501143A - Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer. - Google Patents

Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer. Download PDF

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Publication number
NL8501143A
NL8501143A NL8501143A NL8501143A NL8501143A NL 8501143 A NL8501143 A NL 8501143A NL 8501143 A NL8501143 A NL 8501143A NL 8501143 A NL8501143 A NL 8501143A NL 8501143 A NL8501143 A NL 8501143A
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NL
Netherlands
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Prior art date
Application number
NL8501143A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL8501143A priority Critical patent/NL8501143A/nl
Priority to EP86200629A priority patent/EP0198559B1/fr
Priority to DE8686200629T priority patent/DE3672309D1/de
Priority to AT86200629T priority patent/ATE54211T1/de
Priority to JP61087226A priority patent/JPS61243554A/ja
Priority to US06/854,259 priority patent/US4769769A/en
Publication of NL8501143A publication Critical patent/NL8501143A/nl

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F2205/12—Indexing scheme relating to groups G06F5/12 - G06F5/14
    • G06F2205/123—Contention resolution, i.e. resolving conflicts between simultaneous read and write operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Small-Scale Networks (AREA)
  • Memory System (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
NL8501143A 1985-04-19 1985-04-19 Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer. NL8501143A (nl)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL8501143A NL8501143A (nl) 1985-04-19 1985-04-19 Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer.
EP86200629A EP0198559B1 (fr) 1985-04-19 1986-04-15 Système de communication comprenant un tampon de type première entrée-première sortie
DE8686200629T DE3672309D1 (de) 1985-04-19 1986-04-15 Uebertragungssystem mit fifo-puffer.
AT86200629T ATE54211T1 (de) 1985-04-19 1986-04-15 Uebertragungssystem mit fifo-puffer.
JP61087226A JPS61243554A (ja) 1985-04-19 1986-04-17 通信系
US06/854,259 US4769769A (en) 1985-04-19 1986-04-21 Communication system including a first-in-first-out buffer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8501143A NL8501143A (nl) 1985-04-19 1985-04-19 Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer.
NL8501143 1985-04-19

Publications (1)

Publication Number Publication Date
NL8501143A true NL8501143A (nl) 1986-11-17

Family

ID=19845860

Family Applications (1)

Application Number Title Priority Date Filing Date
NL8501143A NL8501143A (nl) 1985-04-19 1985-04-19 Kommunikatiesysteem voorzien van een eerst-in-eerst-uit-buffer.

Country Status (6)

Country Link
US (1) US4769769A (fr)
EP (1) EP0198559B1 (fr)
JP (1) JPS61243554A (fr)
AT (1) ATE54211T1 (fr)
DE (1) DE3672309D1 (fr)
NL (1) NL8501143A (fr)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3689151D1 (de) * 1986-12-30 1993-11-11 Ibm Nicht-sperrender Warteschlangenmechanismus.
US4984235A (en) * 1987-04-27 1991-01-08 Thinking Machines Corporation Method and apparatus for routing message packets and recording the roofing sequence
US4878197A (en) * 1987-08-17 1989-10-31 Control Data Corporation Data communication apparatus
US5133074A (en) * 1989-02-08 1992-07-21 Acer Incorporated Deadlock resolution with cache snooping
JPH03138751A (ja) * 1989-10-23 1991-06-13 Internatl Business Mach Corp <Ibm> 資源管理方法
GB9008366D0 (en) * 1990-04-12 1990-06-13 British Aerospace Data interaction architecture(dia)for real time embedded multi processor systems
US5315707A (en) * 1992-01-10 1994-05-24 Digital Equipment Corporation Multiprocessor buffer system
CA2134061A1 (fr) * 1993-10-28 1995-04-29 Aaron William Ogus Tamponnage des paquets de donnees dans un reseau
NL9401142A (nl) * 1994-07-11 1996-02-01 Nederland Ptt Overdracht van berichten via verschillende subnetwerken.
US6349350B1 (en) * 1999-05-04 2002-02-19 International Business Machines Corporation System, method, and program for handling failed connections in an input/output (I/O) system
DE19957594B4 (de) * 1999-11-30 2004-08-26 OCé PRINTING SYSTEMS GMBH Verfahren zum Synchronisieren von threads eines Computerprogramms
US7191162B2 (en) * 2003-10-21 2007-03-13 Texas Instruments Incorporated FIFO interface for flag-initiated DMA frame synchro-burst operation
US7836238B2 (en) * 2006-12-19 2010-11-16 International Business Machines Corporation Hot-plug/remove of a new component in a running PCIe fabric
US7984454B2 (en) * 2006-12-19 2011-07-19 International Business Machines Corporation Migration of single root stateless virtual functions
US7813366B2 (en) 2006-12-19 2010-10-12 International Business Machines Corporation Migration of a virtual endpoint from one virtual plane to another
US8271604B2 (en) 2006-12-19 2012-09-18 International Business Machines Corporation Initializing shared memories for sharing endpoints across a plurality of root complexes
US7860930B2 (en) * 2006-12-19 2010-12-28 International Business Machines Corporation Communication between host systems using a transaction protocol and shared memories
US7991839B2 (en) * 2006-12-19 2011-08-02 International Business Machines Corporation Communication between host systems using a socket connection and shared memories
US7836129B2 (en) * 2006-12-19 2010-11-16 International Business Machines Corporation Communication between host systems using a queuing system and shared memories
WO2009083027A1 (fr) * 2007-12-27 2009-07-09 Nokia Corporation Procédé et système de gestion de données dans une mémoire

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4159532A (en) * 1977-08-04 1979-06-26 Honeywell Information Systems Inc. FIFO look-ahead system
US4374428A (en) * 1979-11-05 1983-02-15 Rca Corporation Expandable FIFO system

Also Published As

Publication number Publication date
EP0198559A1 (fr) 1986-10-22
ATE54211T1 (de) 1990-07-15
JPS61243554A (ja) 1986-10-29
US4769769A (en) 1988-09-06
EP0198559B1 (fr) 1990-06-27
DE3672309D1 (de) 1990-08-02

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BV The patent application has lapsed