NL7807314A - Inrichting voor het vergroten van de lengte van een logisch computeradres. - Google Patents

Inrichting voor het vergroten van de lengte van een logisch computeradres. Download PDF

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Publication number
NL7807314A
NL7807314A NL7807314A NL7807314A NL7807314A NL 7807314 A NL7807314 A NL 7807314A NL 7807314 A NL7807314 A NL 7807314A NL 7807314 A NL7807314 A NL 7807314A NL 7807314 A NL7807314 A NL 7807314A
Authority
NL
Netherlands
Prior art keywords
address
output
register
memory
instruction
Prior art date
Application number
NL7807314A
Other languages
English (en)
Dutch (nl)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Priority to NL7807314A priority Critical patent/NL7807314A/nl
Priority to DE19792926589 priority patent/DE2926589A1/de
Priority to GB7923052A priority patent/GB2025097B/en
Priority to US06/054,534 priority patent/US4361868A/en
Priority to JP54085806A priority patent/JPS5855528B2/ja
Priority to FR7917634A priority patent/FR2430636B1/fr
Publication of NL7807314A publication Critical patent/NL7807314A/nl

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System (AREA)
NL7807314A 1978-07-06 1978-07-06 Inrichting voor het vergroten van de lengte van een logisch computeradres. NL7807314A (nl)

Priority Applications (6)

Application Number Priority Date Filing Date Title
NL7807314A NL7807314A (nl) 1978-07-06 1978-07-06 Inrichting voor het vergroten van de lengte van een logisch computeradres.
DE19792926589 DE2926589A1 (de) 1978-07-06 1979-06-30 Anordnung zur verlaengerung einer logischen computeradresse
GB7923052A GB2025097B (en) 1978-07-06 1979-07-03 Address generatingdevice
US06/054,534 US4361868A (en) 1978-07-06 1979-07-03 Device for increasing the length of a logic computer address
JP54085806A JPS5855528B2 (ja) 1978-07-06 1979-07-06 アドレス発生装置
FR7917634A FR2430636B1 (fr) 1978-07-06 1979-07-06 Dispositif pour allonger une adresse logique de calculateur

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL7807314 1978-07-06
NL7807314A NL7807314A (nl) 1978-07-06 1978-07-06 Inrichting voor het vergroten van de lengte van een logisch computeradres.

Publications (1)

Publication Number Publication Date
NL7807314A true NL7807314A (nl) 1980-01-08

Family

ID=19831201

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7807314A NL7807314A (nl) 1978-07-06 1978-07-06 Inrichting voor het vergroten van de lengte van een logisch computeradres.

Country Status (6)

Country Link
US (1) US4361868A (de)
JP (1) JPS5855528B2 (de)
DE (1) DE2926589A1 (de)
FR (1) FR2430636B1 (de)
GB (1) GB2025097B (de)
NL (1) NL7807314A (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3177242D1 (de) * 1980-04-25 1991-04-11 Data General Corp Datenverarbeitungssystem.
JPS5750052A (en) * 1980-09-09 1982-03-24 Toshiba Corp Address extension system
EP0066083B1 (de) * 1981-06-01 1986-07-16 International Business Machines Corporation Einrichtung zur Adressensubstitution
US4432053A (en) * 1981-06-29 1984-02-14 Burroughs Corporation Address generating apparatus and method
US4453212A (en) * 1981-07-13 1984-06-05 Burroughs Corporation Extended address generating apparatus and method
FR2515404B1 (fr) * 1981-10-28 1987-06-26 France Etat Ensemble de gestion de la memoire d'un processeur
US4473878A (en) * 1981-11-23 1984-09-25 Motorola, Inc. Memory management unit
JPS59191919U (ja) * 1983-06-07 1984-12-20 大昭和紙工産業株式会社 提げ袋
DE3479356D1 (en) * 1983-12-23 1989-09-14 Hitachi Ltd A data processor with control of the significant bit lenghts of general purpose registers
US4677548A (en) * 1984-09-26 1987-06-30 Honeywell Information Systems Inc. LSI microprocessor chip with backward pin compatibility and forward expandable functionality
US5027273A (en) * 1985-04-10 1991-06-25 Microsoft Corporation Method and operating system for executing programs in a multi-mode microprocessor
WO1986006521A1 (en) * 1985-04-30 1986-11-06 Fujitsu Limited Address expanding system
JPS6228850A (ja) * 1985-07-31 1987-02-06 Toshiba Corp メモリアドレスマツピング機構
JP2507756B2 (ja) * 1987-10-05 1996-06-19 株式会社日立製作所 情報処理装置
JPH01204147A (ja) * 1988-02-09 1989-08-16 Toshiba Corp アドレス修飾回路
FR2629930B1 (fr) * 1988-04-12 1991-03-15 Labo Electronique Physique Procede et unite de gestion de mots d'adresse
US4965720A (en) * 1988-07-18 1990-10-23 International Business Machines Corporation Directed address generation for virtual-address data processors
JPH0289132A (ja) * 1988-09-26 1990-03-29 Nec Corp 論理アドレス生成方式
US5317706A (en) * 1989-11-15 1994-05-31 Ncr Corporation Memory expansion method and apparatus in a virtual memory system
US5771368A (en) * 1990-10-29 1998-06-23 Sun Microsystems, Inc. Memory addressing scheme for increasing the number of memory locations available in a computer for storing higher precision numbers
EP0492970B1 (de) * 1990-12-21 1995-08-02 Sun Microsystems, Inc. Verfahren und Gerät zur Erweiterung einer Rechnerarchitektur von zweiunddreissig auf vierundsechzig Bits
ES2132073T3 (es) * 1991-01-10 1999-08-16 Siemens Ag Disposicion de circuito para la reproduccion del espacio de direccionamiento logico de una unidad de procesador sobre el espacio de direccionamiento fisico de una memoria.
US5423013A (en) * 1991-09-04 1995-06-06 International Business Machines Corporation System for addressing a very large memory with real or virtual addresses using address mode registers
US5381537A (en) * 1991-12-06 1995-01-10 International Business Machines Corporation Large logical addressing method and means
KR950006332B1 (ko) * 1992-11-19 1995-06-14 삼성전자주식회사 메모리 데이터의 고속 억세스 회로
US5680632A (en) * 1992-12-24 1997-10-21 Motorola, Inc. Method for providing an extensible register in the first and second data processing systems
EP1164479B1 (de) * 1993-05-27 2007-05-09 Matsushita Electric Industrial Co., Ltd. Programmumsetzungseinheit
US5680598A (en) * 1995-03-31 1997-10-21 International Business Machines Corporation Millicode extended memory addressing using operand access control register to control extended address concatenation
US5649125A (en) * 1995-10-30 1997-07-15 Motorola, Inc. Method and apparatus for address extension across a multiplexed communication bus
DE10163342A1 (de) * 2001-12-21 2003-07-10 Elektro Beckhoff Gmbh Unterneh Datenübertragungsverfahren, serielles Bussystem und Anschalteinheit für einen passiven Busteilnehmer
US7596680B2 (en) * 2003-09-15 2009-09-29 International Business Machines Corporation System and method for encoding and decoding architecture registers
US20090210678A1 (en) * 2005-08-01 2009-08-20 Simon Ford Handling of Denormals In Floating Point Number Processim
US8766995B2 (en) * 2006-04-26 2014-07-01 Qualcomm Incorporated Graphics system with configurable caches
US7502908B2 (en) * 2006-05-04 2009-03-10 International Business Machines Corporation Method for providing an address format compatible with different addressing formats used for addressing different sized address spaces
US20070268289A1 (en) * 2006-05-16 2007-11-22 Chun Yu Graphics system with dynamic reposition of depth engine
US8884972B2 (en) * 2006-05-25 2014-11-11 Qualcomm Incorporated Graphics processor with arithmetic and elementary function units
US8869147B2 (en) * 2006-05-31 2014-10-21 Qualcomm Incorporated Multi-threaded processor with deferred thread output control
US8644643B2 (en) 2006-06-14 2014-02-04 Qualcomm Incorporated Convolution filtering in a graphics processor
US8766996B2 (en) 2006-06-21 2014-07-01 Qualcomm Incorporated Unified virtual addressed register file
US10198203B2 (en) * 2016-11-15 2019-02-05 Samsung Electronics Co., Ltd. Method of operating memory device using pseudo-random functions, memory device using the same and memory system including the device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3412382A (en) * 1965-11-26 1968-11-19 Massachusetts Inst Technology Shared-access data processing system
NL6806735A (de) * 1968-05-11 1969-11-13
NL6815506A (de) * 1968-10-31 1970-05-04
US3735355A (en) * 1971-05-12 1973-05-22 Burroughs Corp Digital processor having variable length addressing
FR2329170A5 (fr) * 1973-02-06 1977-05-20 Ibm France Calculateur muni de facilites d'extension d'adresse
FR122199A (de) * 1973-12-17
US3949378A (en) * 1974-12-09 1976-04-06 The United States Of America As Represented By The Secretary Of The Navy Computer memory addressing employing base and index registers
US4044334A (en) * 1975-06-19 1977-08-23 Honeywell Information Systems, Inc. Database instruction unload
FR2337373A1 (fr) * 1975-12-31 1977-07-29 Honeywell Bull Soc Ind Dispositif de developpement d'adresse faisant intervenir une nouvelle technique de pagination
US4084227A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
US4128875A (en) * 1976-12-16 1978-12-05 Sperry Rand Corporation Optional virtual memory system
US4096573A (en) * 1977-04-25 1978-06-20 International Business Machines Corporation DLAT Synonym control means for common portions of all address spaces

Also Published As

Publication number Publication date
GB2025097B (en) 1982-12-08
FR2430636A1 (fr) 1980-02-01
DE2926589A1 (de) 1980-01-24
FR2430636B1 (fr) 1986-09-26
JPS5513499A (en) 1980-01-30
US4361868A (en) 1982-11-30
JPS5855528B2 (ja) 1983-12-10
GB2025097A (en) 1980-01-16

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