NL7611929A - PROCEDURE FOR THE MANUFACTURE OF A HALFGE-LEADER DEVICE AND HALFGE-LEADER DEVICE OBTAINED THEREFORE. - Google Patents

PROCEDURE FOR THE MANUFACTURE OF A HALFGE-LEADER DEVICE AND HALFGE-LEADER DEVICE OBTAINED THEREFORE.

Info

Publication number
NL7611929A
NL7611929A NL7611929A NL7611929A NL7611929A NL 7611929 A NL7611929 A NL 7611929A NL 7611929 A NL7611929 A NL 7611929A NL 7611929 A NL7611929 A NL 7611929A NL 7611929 A NL7611929 A NL 7611929A
Authority
NL
Netherlands
Prior art keywords
halfge
leader device
procedure
manufacture
device obtained
Prior art date
Application number
NL7611929A
Other languages
Dutch (nl)
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7611929A publication Critical patent/NL7611929A/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
NL7611929A 1975-10-29 1976-10-27 PROCEDURE FOR THE MANUFACTURE OF A HALFGE-LEADER DEVICE AND HALFGE-LEADER DEVICE OBTAINED THEREFORE. NL7611929A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50129208A JPS5253666A (en) 1975-10-29 1975-10-29 Method of preventing impurity diffusion from doped oxide

Publications (1)

Publication Number Publication Date
NL7611929A true NL7611929A (en) 1977-05-03

Family

ID=15003796

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7611929A NL7611929A (en) 1975-10-29 1976-10-27 PROCEDURE FOR THE MANUFACTURE OF A HALFGE-LEADER DEVICE AND HALFGE-LEADER DEVICE OBTAINED THEREFORE.

Country Status (2)

Country Link
JP (1) JPS5253666A (en)
NL (1) NL7611929A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999033098A1 (en) * 1997-12-19 1999-07-01 Micron Technology, Inc. Semiconductor processing method comprising the fabrication of a barrier layer

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5384572A (en) * 1976-12-29 1978-07-26 Fujitsu Ltd Manufacture for mis type semiconductor device
JPS53103380A (en) * 1977-02-22 1978-09-08 Oki Electric Ind Co Ltd Production of semiconductor device
JPS58168240A (en) * 1982-03-30 1983-10-04 Fujitsu Ltd Semiconductor device
JPS60183763A (en) * 1984-03-02 1985-09-19 Rohm Co Ltd Semiconductor device
JPS61214555A (en) * 1985-03-20 1986-09-24 Hitachi Ltd Semiconductor device
JPS6362380A (en) * 1986-09-03 1988-03-18 Mitsubishi Electric Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999033098A1 (en) * 1997-12-19 1999-07-01 Micron Technology, Inc. Semiconductor processing method comprising the fabrication of a barrier layer

Also Published As

Publication number Publication date
JPS5253666A (en) 1977-04-30

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Legal Events

Date Code Title Description
BV The patent application has lapsed