NL7409555A - METHOD OF MANUFACTURING A TRANSISTOR AND TRANSISTOR MANUFACTURED ACCORDING TO THIS METHOD. - Google Patents

METHOD OF MANUFACTURING A TRANSISTOR AND TRANSISTOR MANUFACTURED ACCORDING TO THIS METHOD.

Info

Publication number
NL7409555A
NL7409555A NL7409555A NL7409555A NL7409555A NL 7409555 A NL7409555 A NL 7409555A NL 7409555 A NL7409555 A NL 7409555A NL 7409555 A NL7409555 A NL 7409555A NL 7409555 A NL7409555 A NL 7409555A
Authority
NL
Netherlands
Prior art keywords
transistor
manufacturing
manufactured according
transistor manufactured
manufactured
Prior art date
Application number
NL7409555A
Other languages
Dutch (nl)
Other versions
NL167548B (en
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US00379408A external-priority patent/US3856578A/en
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of NL7409555A publication Critical patent/NL7409555A/en
Publication of NL167548B publication Critical patent/NL167548B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
NL7409555.A 1973-07-16 1974-07-15 METHOD FOR MANUFACTURING A TRANSISTOR IN WHICH AN P-TYPE OF BASIC AREA IS FORMED IN AN N-TYPE OF SEMI-CONDUCTOR PART OF A SEMI-CONDUCTOR BODY BY A FIRST BORIUM OF TWO-ORD AND TWO-FORGES OF BORIUM IN THE SURFACE PART AND IN WHICH IN THE BASIC AREA AN N-TYPE EMITTER AREA IS PROCESSED FOR MANUFACTURING A TRANSISTOR IN WHICH AN N-TYPE SURFACE PART OF A SEMICONDUCTOR BODY IS FIRED WITH BORDER. NL167548B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00379408A US3856578A (en) 1972-03-13 1973-07-16 Bipolar transistors and method of manufacture

Publications (2)

Publication Number Publication Date
NL7409555A true NL7409555A (en) 1975-01-20
NL167548B NL167548B (en) 1981-07-16

Family

ID=23497136

Family Applications (1)

Application Number Title Priority Date Filing Date
NL7409555.A NL167548B (en) 1973-07-16 1974-07-15 METHOD FOR MANUFACTURING A TRANSISTOR IN WHICH AN P-TYPE OF BASIC AREA IS FORMED IN AN N-TYPE OF SEMI-CONDUCTOR PART OF A SEMI-CONDUCTOR BODY BY A FIRST BORIUM OF TWO-ORD AND TWO-FORGES OF BORIUM IN THE SURFACE PART AND IN WHICH IN THE BASIC AREA AN N-TYPE EMITTER AREA IS PROCESSED FOR MANUFACTURING A TRANSISTOR IN WHICH AN N-TYPE SURFACE PART OF A SEMICONDUCTOR BODY IS FIRED WITH BORDER.

Country Status (7)

Country Link
JP (1) JPS5050876A (en)
BE (1) BE817664R (en)
DE (1) DE2433839A1 (en)
FR (1) FR2238245B2 (en)
GB (1) GB1472997A (en)
NL (1) NL167548B (en)
SE (1) SE405526B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997367A (en) * 1975-11-20 1976-12-14 Bell Telephone Laboratories, Incorporated Method for making transistors
EP0071665B1 (en) * 1981-08-08 1986-04-16 Deutsche ITT Industries GmbH Method of producing a monolithic integrated solid-state circuit with at a least one bipolar planar transistor
JPH07118484B2 (en) * 1987-10-09 1995-12-18 沖電気工業株式会社 Method for manufacturing Schottky gate field effect transistor

Also Published As

Publication number Publication date
SE7408945L (en) 1975-01-17
SE405526B (en) 1978-12-11
BE817664R (en) 1974-11-04
NL167548B (en) 1981-07-16
GB1472997A (en) 1977-05-11
JPS5050876A (en) 1975-05-07
DE2433839A1 (en) 1975-02-06
FR2238245A2 (en) 1975-02-14
FR2238245B2 (en) 1978-03-17

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Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee