NL7317292A - - Google Patents

Info

Publication number
NL7317292A
NL7317292A NL7317292A NL7317292A NL7317292A NL 7317292 A NL7317292 A NL 7317292A NL 7317292 A NL7317292 A NL 7317292A NL 7317292 A NL7317292 A NL 7317292A NL 7317292 A NL7317292 A NL 7317292A
Authority
NL
Netherlands
Application number
NL7317292A
Other versions
NL181471C (nl
NL181471B (nl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US00320394A external-priority patent/US3841926A/en
Priority claimed from US00320395A external-priority patent/US3811076A/en
Application filed filed Critical
Publication of NL7317292A publication Critical patent/NL7317292A/xx
Publication of NL181471B publication Critical patent/NL181471B/xx
Application granted granted Critical
Publication of NL181471C publication Critical patent/NL181471C/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/813—Combinations of field-effect devices and capacitor only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
NLAANVRAGE7317292,A 1973-01-02 1973-12-18 Werkwijze voor het vervaardigen van een geintegreerde halfgeleidergeheugenschakeling, omvattende een matrix van halfgeleidergeheugencellen, die bestaan uit een serieschakeling van een veldeffecttransistor en een condensator. NL181471C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US00320394A US3841926A (en) 1973-01-02 1973-01-02 Integrated circuit fabrication process
US00320395A US3811076A (en) 1973-01-02 1973-01-02 Field effect transistor integrated circuit and memory

Publications (3)

Publication Number Publication Date
NL7317292A true NL7317292A (OSRAM) 1974-07-04
NL181471B NL181471B (nl) 1987-03-16
NL181471C NL181471C (nl) 1987-08-17

Family

ID=26982472

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7317292,A NL181471C (nl) 1973-01-02 1973-12-18 Werkwijze voor het vervaardigen van een geintegreerde halfgeleidergeheugenschakeling, omvattende een matrix van halfgeleidergeheugencellen, die bestaan uit een serieschakeling van een veldeffecttransistor en een condensator.

Country Status (3)

Country Link
CH (1) CH573661A5 (OSRAM)
DE (1) DE2363466C3 (OSRAM)
NL (1) NL181471C (OSRAM)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL176415C (nl) * 1976-07-05 1985-04-01 Hitachi Ltd Halfgeleidergeheugeninrichting omvattende een matrix van halfgeleidergeheugencellen, die bestaan uit een veldeffekttransistor en een opslagcapaciteit.
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
US4222816A (en) * 1978-12-26 1980-09-16 International Business Machines Corporation Method for reducing parasitic capacitance in integrated circuit structures
DE3277343D1 (en) * 1982-06-14 1987-10-22 Ibm Deutschland Method of adjusting the edge angle in polysilicon

Also Published As

Publication number Publication date
DE2363466B2 (de) 1980-01-24
AU6351973A (en) 1975-06-12
CH573661A5 (OSRAM) 1976-03-15
DE2363466C3 (de) 1980-10-02
DE2363466A1 (de) 1974-07-04
NL181471C (nl) 1987-08-17
NL181471B (nl) 1987-03-16

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Legal Events

Date Code Title Description
BB A search report has been drawn up
BC A request for examination has been filed
A85 Still pending on 85-01-01
V1 Lapsed because of non-payment of the annual fee