NL6914952A - - Google Patents

Info

Publication number
NL6914952A
NL6914952A NL6914952A NL6914952A NL6914952A NL 6914952 A NL6914952 A NL 6914952A NL 6914952 A NL6914952 A NL 6914952A NL 6914952 A NL6914952 A NL 6914952A NL 6914952 A NL6914952 A NL 6914952A
Authority
NL
Netherlands
Application number
NL6914952A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6914952A publication Critical patent/NL6914952A/xx

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6322Formation by thermal treatments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302Non-deposition formation processes
    • H10P14/6304Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1404Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase
    • H10P32/1406Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase by ion implantation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/914Doping
    • Y10S438/92Controlling diffusion profile by oxidation
NL6914952A 1968-10-04 1969-10-03 NL6914952A (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP43071852A JPS4915377B1 (https=) 1968-10-04 1968-10-04

Publications (1)

Publication Number Publication Date
NL6914952A true NL6914952A (https=) 1970-04-07

Family

ID=13472467

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6914952A NL6914952A (https=) 1968-10-04 1969-10-03

Country Status (6)

Country Link
US (1) US3745070A (https=)
JP (1) JPS4915377B1 (https=)
DE (1) DE1950069B2 (https=)
FR (1) FR2023314A1 (https=)
GB (1) GB1239684A (https=)
NL (1) NL6914952A (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895965A (en) * 1971-05-24 1975-07-22 Bell Telephone Labor Inc Method of forming buried layers by ion implantation
FR2209217B1 (https=) * 1972-11-10 1977-12-16 Lignes Telegraph Telephon
US3852119A (en) * 1972-11-14 1974-12-03 Texas Instruments Inc Metal-insulator-semiconductor structures having reduced junction capacitance and method of fabrication
US3966501A (en) * 1973-03-23 1976-06-29 Mitsubishi Denki Kabushiki Kaisha Process of producing semiconductor devices
US3959025A (en) * 1974-05-01 1976-05-25 Rca Corporation Method of making an insulated gate field effect transistor
DE2507613C3 (de) * 1975-02-21 1979-07-05 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung eines invers betriebenen Transistors
US4038106A (en) * 1975-04-30 1977-07-26 Rca Corporation Four-layer trapatt diode and method for making same
US4055443A (en) * 1975-06-19 1977-10-25 Jury Stepanovich Akimov Method for producing semiconductor matrix of light-emitting elements utilizing ion implantation and diffusion heating
US4055444A (en) * 1976-01-12 1977-10-25 Texas Instruments Incorporated Method of making N-channel MOS integrated circuits
US4092209A (en) * 1976-12-30 1978-05-30 Rca Corp. Silicon implanted and bombarded with phosphorus ions
US4168990A (en) * 1977-04-04 1979-09-25 International Rectifier Corporation Hot implantation at 1100°-1300° C. for forming non-gaussian impurity profile
US4218267A (en) * 1979-04-23 1980-08-19 Rockwell International Corporation Microelectronic fabrication method minimizing threshold voltage variation
DE3118785A1 (de) * 1981-05-12 1982-12-02 Siemens AG, 1000 Berlin und 8000 München Verfahren und vorrichtung zum dotieren von halbleitermaterial
JPS6065528A (ja) * 1983-09-21 1985-04-15 Hitachi Ltd pn接合形成法
US4818711A (en) * 1987-08-28 1989-04-04 Intel Corporation High quality oxide on an ion implanted polysilicon surface
AU5779200A (en) 1999-07-01 2001-01-22 E-Ink Corporation Electrophoretic medium provided with spacers
KR100767233B1 (ko) 2000-04-18 2007-10-17 이 잉크 코포레이션 박막 트랜지스터의 제조 공정 및 기판
US7893435B2 (en) 2000-04-18 2011-02-22 E Ink Corporation Flexible electronic circuits and displays including a backplane comprising a patterned metal foil having a plurality of apertures extending therethrough

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1150454B (de) * 1960-11-14 1963-06-20 Licentia Gmbh Verfahren zum Herstellen von pn-UEbergaengen in Siliziumscheiben
US3158505A (en) * 1962-07-23 1964-11-24 Fairchild Camera Instr Co Method of placing thick oxide coatings on silicon and article
NL302630A (https=) * 1963-01-18 1900-01-01
USB421061I5 (https=) * 1964-12-24
US3388009A (en) * 1965-06-23 1968-06-11 Ion Physics Corp Method of forming a p-n junction by an ionic beam

Also Published As

Publication number Publication date
DE1950069B2 (de) 1981-10-08
FR2023314A1 (https=) 1970-08-21
JPS4915377B1 (https=) 1974-04-15
US3745070A (en) 1973-07-10
DE1950069A1 (de) 1970-04-23
GB1239684A (https=) 1971-07-21

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