NL6907696A - - Google Patents

Info

Publication number
NL6907696A
NL6907696A NL6907696A NL6907696A NL6907696A NL 6907696 A NL6907696 A NL 6907696A NL 6907696 A NL6907696 A NL 6907696A NL 6907696 A NL6907696 A NL 6907696A NL 6907696 A NL6907696 A NL 6907696A
Authority
NL
Netherlands
Application number
NL6907696A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of NL6907696A publication Critical patent/NL6907696A/xx

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/80Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors
    • H10D86/85Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple passive components, e.g. resistors, capacitors or inductors characterised by only passive components

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Electronic Switches (AREA)
NL6907696A 1968-06-07 1969-05-20 NL6907696A (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US73527968A 1968-06-07 1968-06-07

Publications (1)

Publication Number Publication Date
NL6907696A true NL6907696A (https=) 1969-12-09

Family

ID=24955115

Family Applications (1)

Application Number Title Priority Date Filing Date
NL6907696A NL6907696A (https=) 1968-06-07 1969-05-20

Country Status (8)

Country Link
US (1) US3576668A (https=)
JP (1) JPS4945909B1 (https=)
BE (1) BE730762A (https=)
DE (1) DE1916789C3 (https=)
FR (1) FR2010312A1 (https=)
GB (1) GB1227653A (https=)
IL (1) IL31853A (https=)
NL (1) NL6907696A (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3766445A (en) * 1970-08-10 1973-10-16 Cogar Corp A semiconductor substrate with a planar metal pattern and anodized insulating layers
NL7302767A (https=) * 1973-02-28 1974-08-30
US3868723A (en) * 1973-06-29 1975-02-25 Ibm Integrated circuit structure accommodating via holes
DE2553763C3 (de) * 1975-11-29 1982-08-19 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Herstellung einer elektronischen Schaltung
JPS5729185U (https=) 1980-07-28 1982-02-16
JPS58101442A (ja) * 1981-12-11 1983-06-16 Hitachi Ltd 電気的装置用基板
DE3241225A1 (de) * 1982-11-09 1984-05-10 F & O Electronic Systems GmbH & Co, 6901 Neckarsteinach Verfahren zur herstellung elektronischer schaltelemente und/oder schaltungen in vielschicht-dickfilmtechnik (multilayer thick film technology) auf einem substrat und dergestalt hergestellte schaltelemente und/oder schaltungen
US4657778A (en) * 1984-08-01 1987-04-14 Moran Peter L Multilayer systems and their method of production
US4645552A (en) * 1984-11-19 1987-02-24 Hughes Aircraft Company Process for fabricating dimensionally stable interconnect boards
JPS61236192A (ja) * 1985-04-12 1986-10-21 株式会社日立製作所 セラミツク基板の電極形成方法
DE3621667A1 (de) * 1985-06-29 1987-01-08 Toshiba Kawasaki Kk Mit einer mehrzahl von dickfilmen beschichtetes substrat, verfahren zu seiner herstellung und dieses enthaltende vorrichtung
DE3602960C1 (de) * 1986-01-31 1987-02-19 Philips Patentverwaltung Dickschicht-Schaltungsanordnung mit einer keramischen Substratplatte
US5045141A (en) * 1988-07-01 1991-09-03 Amoco Corporation Method of making solderable printed circuits formed without plating
EP1187521A1 (de) * 2000-09-09 2002-03-13 AB Mikroelektronik Gesellschaft m.b.H. Verfahren zur Herstellung einer Trägerplatte für elektronische Bauteile
US20080131673A1 (en) * 2005-12-13 2008-06-05 Yasuyuki Yamamoto Method for Producing Metallized Ceramic Substrate

Also Published As

Publication number Publication date
GB1227653A (https=) 1971-04-07
DE1916789A1 (de) 1969-12-18
BE730762A (https=) 1969-09-01
IL31853A (en) 1972-03-28
IL31853A0 (en) 1969-05-28
DE1916789B2 (https=) 1970-11-05
US3576668A (en) 1971-04-27
JPS4945909B1 (https=) 1974-12-06
DE1916789C3 (de) 1974-03-28
FR2010312A1 (https=) 1970-02-13

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