NL2022765A - Step-by-Step Doping Method of Phosphorous for High-efficiency and Low-cost Crystalline Silicon Cell - Google Patents
Step-by-Step Doping Method of Phosphorous for High-efficiency and Low-cost Crystalline Silicon Cell Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 229910021419 crystalline silicon Inorganic materials 0.000 title claims abstract description 17
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 title description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 92
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims abstract description 67
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 52
- 239000011574 phosphorus Substances 0.000 claims abstract description 51
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 48
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 48
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 48
- 239000001301 oxygen Substances 0.000 claims abstract description 48
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 46
- 238000009792 diffusion process Methods 0.000 claims abstract description 37
- 230000008021 deposition Effects 0.000 claims abstract description 29
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 27
- 239000010703 silicon Substances 0.000 claims abstract description 27
- 238000005530 etching Methods 0.000 claims abstract description 11
- 239000011521 glass Substances 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 230000001681 protective effect Effects 0.000 claims description 19
- 238000001816 cooling Methods 0.000 claims description 18
- 238000010438 heat treatment Methods 0.000 claims description 16
- 238000003486 chemical etching Methods 0.000 claims description 10
- 238000007639 printing Methods 0.000 claims description 10
- 238000003780 insertion Methods 0.000 claims 5
- 230000037431 insertion Effects 0.000 claims 5
- 238000000151 deposition Methods 0.000 abstract description 25
- 238000009826 distribution Methods 0.000 abstract description 12
- 230000006798 recombination Effects 0.000 abstract description 10
- 238000005215 recombination Methods 0.000 abstract description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 239000002019 doping agent Substances 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 239000002184 metal Substances 0.000 abstract description 4
- 230000001010 compromised effect Effects 0.000 abstract description 3
- 230000000052 comparative effect Effects 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 239000002002 slurry Substances 0.000 description 3
- 230000001276 controlling effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 1
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 1
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention relates to the technical field of solar cell manufacturing, and to a high-efficiency low-cost step-by-step doping method of phosphorus for a crystalline silicon cell. The method comprises a depletion-type phosphorus diffusion, a high-concentration shallow layer diffusion and back-etching. The low-temperature low-phosphorus deposition is performed on a p-type silicon substrate by controlling the oxygen flow rate, the nitrogen flow rate, and the phosphorus oxychloride flow rate, and then the phosphorus in the phosphorosilicate glass is depleted by a long period of high-temperature drive-in to achieve a low surface concentration layer n+. A second deposition and drive-in are performed on the non-phosphorus glass to increase the surface concentration, and thus form a very thin high-concentration layer n++, which can be quickly etched away by back-etching. The distribution of phosphorus dopant in different regions can be independently and precisely controlled, to ensure a low doping concentration and a low recombination current in a non-electrode region, thereby ensuring a high open-circuit voltage. An electrode region has a high doping concentration, and has a good ohmic contact with a metal electrode, such that the fill factor is not compromised, thereby improving the photoelectric conversion performance of the cell on a whole.
Description
Field of the Invention
The present invention relates to the technical field of solar cell manufacturing, and particularly to a step-by-step doping method of phosphorus for a high-efficiency and low-cost crystalline silicon cell, which comprises depletion-type phosphorus diffusion, high-concentration shallow layer diffusion and back-etching.
2. Description of the Related Art
Photovoltaic power generation is one of the fastest growing renewable energy technologies in recent years, and crystalline silicon solar cells account for more than 90% of the global PV market. High photoelectric conversion efficiency and low cell manufacturing cost are a perennial subject of interest in the development of the photovoltaic industry. The high-efficiency crystalline silicon solar cells mainly combine advanced doping techniques, surface passivation techniques, light trapping techniques, and electrode fabrication techniques. High-efficiency crystalline silicon solar cells currently include mainly back passivated solar cells (a general designation of PERL and PERC), heterojunction with intrinsic thin layer (HIT) solar cells, and interdigitated-back-contact (IBC) solar cells. The distribution of a doping element in the crystalline silicon cell has a crucial influence on the transmission and collection of photo-generated carriers, which directly affects the conversion efficiency of the cell.
A solar cell has a p-type crystalline silicon as a substrate. In the prior art, raw materials Ng, O2, and POCI3 are introduced to a surface of a p-type silicon chip at a high temperature, and chemically reacted, to form a layer of phosphorosilicate glass on the surface of the silicon chip; then the phosphorus atom is diffused into the silicon to form a phosphorus doped layer that is an n-type layer; and the n-type layer forms a pn junction with the p-type silicon substrate. The n-type layer on the surface of the p-type silicon is also known as an emitter.
The emitter of a high-efficiency cell is a so-called selective emitter. That is, the phosphorous doping concentration is high (n++) in an emitter region under the metal grid line, which can reduce the series resistance of the cells, thereby increasing the fill factor of the battery. The phosphorous doping concentration is low (n+) in an emitter region that does not contact the grid line, which can reduce the minority carrier recombination, and increase the open circuit voltage of the cells. The selective emitter, that is, the specific spatial distribution of phosphorus is now achieved by the following processes:
1. One-step diffusion process: That is, in the diffusion process, the diffusion is partially blocked by a mask layer, and shallow junction and light-doping are formed in the mask region. This method is simple, but the mask may impact the uniformity of diffusion, and the coordination of dense diffusion and light diffusion cannot be well governed. This method has poor control accuracy for doping concentration distribution.
2. Two-step diffusion process; Mature lithographic masking technology in the manufacture of semiconductor chips is utilized in the process. First, a layer of silicon oxide is formed on the surface of silicon; a photoresist is spin-coated, and an electrode window is formed after exposure and development; the silicon oxide at the window is etched away; the photoresist is removed, and diffusion is performed to diffuse the phosphorus element into the window free of silicon oxide (that is, the position where an electrode is to be made later), where no phosphorus is diffused into the area covered with silicon oxide. Then all the silicon oxide on the surface of the crystalline silicon is removed, and the entire surface of the silicon chip is subjected to a second diffusion. Thus, a deep-junction heavy-diffusion region is obtained in the electrode region (because two diffusions occur here, so the diffusion concentration is high and the diffusion depth is large), and a shallow-junction light-diffusion region is obtained in the non-electrode region. A photolithography process is used in this method, and the low concentration doping and the high concentration doping are formed simultaneously at the second diffusion, which is disadvantageous for the precise control of doping in the two different regions; and the cost is high.
3. Phosphorus paste printing technology: That is, different concentrations of phosphorus slurry are printed and diffused at different locations. A high concentration of phosphorus slurry is printed in the electrode region, and a low concentration of phosphorus slurry is printed in the non-electrode region. Then the selective emitter is prepared by one high-temperature diffusion. This method has the problem of uneven junction depth. In addition, in the subsequent process, electrode grid lines are printed in corresponding areas, so a relatively high requirement is raised for the alignment accuracy.
4. Laser doping technology: This technology comprises depositing a phosphorus source on the surface of a silicon chip, followed by laser doping. However, laser doping is costly, and high-power laser can easily damage the surface of the silicon chip.
The three parameters which have a great influence on the efficiency of the crystalline silicon cells include the peak concentration in the n++ region, the depth at a position in the n++ region where the phosphorus concentration is 5 x 1019/cm3, and the depth at a position in the n+ region where the phosphorus concentration is 1x1017/cm3. That is to say, on one hand, the doping concentration in the n++ emitter region needs to be high, and at the same time the thickness of the high-concentration doped n++ layer needs to be small. On the other hand, the surface phosphorus concentration of the non-electrode region n+ needs to be low, such that the Auger recombination and shockley-Read-Hall(SRH) recombination can be significantly reduced, to accomplish the manufacturing of a high-efficiency crystalline silicon cell. For a high-efficiency cell, these three parameters need be able to be precisely controlled at the same time. The existing methods have difficulty in achieving the control accuracy for the transverse and longitudinal spatial distribution of phosphorus required by high-efficiency crystalline silicon cells.
SUMMARY OF THE INVENTION
In order to achieve a desirable doping profile of phosphorus, the present invention provides a method comprising depletion-type phosphorus diffusion, high-concentration shallow layer diffusion and back etching. The method has a greater potential for improving the cell efficiency and a lower cost. A first low-temperature low-phosphorus deposition is performed on a p-type silicon substrate by controlling the oxygen flow rate, the nitrogen flow rate, and the phosphorus oxychloride flow rate, and then the phosphorus in the phosphorosilicate glass (PSG) is depleted by a long period of high-temperature drive-in to form a low surface concentration layer n+. A second low-temperature high-phosphorus deposition is performed on the non-phosphorus glass, followed by a second deposition drive-in, to increase the surface concentration, and form a high-concentration layer n++. This is advantageous in that on one hand, the glass layer on the silicon does not contain phosphorus due to the first drive-in, so that upon the second drive-in, the phosphorus source needs to diffuse down through the glass layer, thereby improving the controllability of shallow layer diffusion. This ensures that the high-concentration layer n++ is very thin. Finally, a protective paste is printed to protect the electrode region and chemical etching is performed. Since the high-concentration doped layer is very thin, the unprotected portion can be quickly etched away, and finally the protective paste is washed away, thereby completing the production of an emitter having high open circuit voltage and good contact. The distribution of phosphorus dopant in different regions can be independently and precisely controlled, to ensure that the non-electrode region has a low doping concentration and a low recombination current, thereby ensuring a high open-circuit voltage; and the electrode region has a high doping concentration, and has a good ohmic contact with a metal electrode, such that the fill factor is not compromised, thereby improving the photoelectric conversion performance of the cell on a whole.
Preferably, the doping method of phosphorous for crystalline silicon cells specifically comprises the following steps:
(A) performing a low-temperature deposition for 3-10 min by feeding a p-type silicon chip to a diffusion tube, wherein the deposition temperature is 750-800°C, the nitrogen flow rate is 10-15 slm, the oxygen flow rate is 200-600 seem, and the phosphorus oxychloride flow rate is 300-800 seem;
(B) performing a first drive-in for 30-50 min by heating to 840-900°C at a heating rate of 10°C/min to form a low surface-concentration layer n+, wherein the nitrogen flow rate is maintained at 10-15 slm, the oxygen flow rate is maintained at 800-1600 seem, and the phosphorus oxychloride flow rate is stopped, the depth of the n+ layer is greater than 0.4 pm and the concentration is less than 6 x 1019.
(C) cooling to 780-840°C at a cooling rate of 10°C/min wherein the nitrogen flow rate is maintained at 10-15 slm, and the oxygen flow rate is stopped; and performing a second deposition for 10-30 min, wherein the nitrogen flow rate is 10-15 slm, the oxygen flow rate is 200-600 seem, and the phosphorus oxychloride flow rate is 600-1200 seem;
(D) performing a second drive-in for 10-25 min by maintaining the temperature at 780-840°C to form a high-concentration layer n++, wherein the nitrogen flow rate is maintained at 10-15 slm, the oxygen flow rate is maintained at 800-1600 seem, and the phosphorus oxychloride flow rate is stopped, the depth of the n++ layer is less than 50 nm and the concentration is greater than 4 x 1020;
(E) cooling to 680-720°C at a cooling rate of 10°C/min, wherein the nitrogen flow rate is maintained at 10-15 slm, and the oxygen flow rate is maintained at 1600-2200 seem, and then removing the silicon chip from a boat; and (F) protecting the electrode region by printing a protective paste; performing chemical etching to etch away the unprotected portion; and finally washing away the protective paste, to produce an emitter having high open circuit voltage and good contact.
Preferably, the emitter obtained by the doping method is independently and accurately controlled by the first and second drive-in; and the finally formed emitter is consistent in parameters with the drive-in processes, that is, the depth of the non-electrode region is greater than 0.4 pm, and the concentration is less than 6 x 1019; and the depth of the electrode region is less than 50 nm, and the concentration is greater than 4 x 1020.
In order to obtain a low surface concentration and a deep junction in the non-electrode region, the flow rates of phosphorus oxychloride and oxygen are required to be not high during the diffusion. Therefore, the flow rates of phosphorous oxychloride and oxygen need to be controlled during the deposition process. However, a low concentration will result in the problem of uniformity, so the nitrogen flow rate is increased to improve the uniformity. Thus, in the case of a low phosphorus source, the phosphorus content in the phosphorosilicate glass (PSG) will be very low. After the first long period of drive-in, the phosphorus is driven into the silicon as much as possible. That is, the P content in PSG is depleted by means of one deposition of phosphorus oxychloride at a low temperature and a low flow rate for a short period of time, followed by high-temperature drive-in, to ensure that the content of doped phosphorus is low enough. A phosphorus doping profile of the Gaussian curve distribution is formed after a long period of high-temperature drive-in, thereby ensuring a low recombination current. This is used as a doping profile for the non-electrode region.
The second drive-in of the phosphorus dopant is achieved with a high concentration of phosphorus source in a short period of time through a layer of non-phosphorus glass. The surface doping concentration of phosphorus is increased to ensure good ohmic contact in the electrode region. This layer is very shallow, and can be easily removed by back-etching, thereby ensuring that the non-electrode region retains the phosphorus doping profile attained after the first low-temperature deposition and high-temperature drive-in.
Finally, the temperature is reduced to 700°C before the silicon chip is removed from the boat. During the period, oxygen is continuously introduced, to achieve an impurity absorption effect. This allows the internal metal ion impurities close to the surface of the silicon chip to be evolved into the PSG and removed.
In the method of the present invention, the first low-temperature low-phosphorous deposition and high-temperature drive-in are performed for regulating the concentration distribution in the non-electrode region. In order to achieve a lower recombination current at the emitter, a low surface concentration of the pn junction, a large junction depth and a quasi-Gaussian curve are needed to be achieved. This allows the cell to achieve a high open-circuit voltage and short-circuit current. However, if the entire surface has such a distribution, the ohmic contact in the electrode region will become very poor. Therefore, a second deposition and drive-in are needed to be performed on the surface so that the silicon chip has a higher surface concentration, but this high-concentration region is relatively shallow. If the cell is prepared as such, although the ohmic contact of the electrode region becomes better, the recombination current of the non-electrode region is very high, and the efficiency is less good. Therefore, it is necessary to achieve a high doping in the electrode region and a low doping in the non-electrode region by combining the printing of a protective paste on the electrode region and chemically back-etching of the non-electrode region (where the shallow high-concentration region can be easily etched away), thereby precisely controlling the distribution of phosphorus dopant in different regions.
As compared with the prior art, the invention has the following advantages: the method of the present invention requires neither lithography nor laser, and employs the conventional thermal diffusion and chemical etching methods. In the invention, the method comprises a first depletion-type phosphorus diffusion, a second high-concentration shallow layer diffusion and back-etching, the distribution of phosphorus dopant in different regions can be independently and precisely controlled, to ensure that the non-electrode region has a low doping concentration and a low recombination current, thereby ensuring a high open-circuit voltage; and the electrode region has a high doping concentration, and forms a good ohmic contact with a metal, such that the fill factor is not compromised, thereby improving the electrical performance on a whole.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 shows the temperature curves in the doping process of embodiment 1 and comparative embodiment 1.
Fig. 2 shows comparisons of the phosphorus concentration profiles in the electrode regions (indicated by n++ in the figure) and the non-electrode regions (indicated by n+ in the figure) in embodiment 1 and comparative embodiment 1.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1
The doping method of phosphorous for a crystalline silicon cell includes a first depletion-type phosphorus diffusion, a second high-concentration shallow layer diffusion and back-etching. The doping method comprises the following steps:
Step 1: A first low-temperature deposition was performed for 5 min at a temperature of 785°C, a nitrogen flow rate of 13 slm, an oxygen flow rate of 250 seem, and a phosphorus oxychloride flow rate of 500 seem.
Step 2: A first drive-in was performed for 40 min by heating to 860 °C at a heating rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1000 seem, and the phosphorus oxychloride flow rate was stopped, to form a low surface-concentration layer n+, wherein the surface concentration was 5.43 x 1019/cm3.
Step 3: The temperature was reduced to 830°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the oxygen flow rate was stopped; and a second deposition was performed for 20 min at a nitrogen flow rate of 13 slm, an oxygen flow rate of 400 seem, and a phosphorus oxychloride flow rate of 800 seem.
Step 4: A second drive-in was performed for 18 min by maintaining the temperature at 830°C while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1000 seem, and the phosphorus oxychloride flow rate was stopped, to form a high-concentration layer n++, wherein the surface concentration of the n++ layer was 5.55 x 1020.
Step 5: The temperature was reduced to 700°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the oxygen flow rate was maintained at 2000 seem, and then the silicon chip was removed.
Step 6: The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected portion, and finally the protective paste was washed away, to produce an emitter having high open circuit voltage and good contact.
The comparison of the phosphorus concentration distributions of embodiment 1 and comparative embodiment 1 is shown in Fig. 2. It can be seen from Fig. 2 that the surface concentration in the electrode region of the present invention is 5.55 x 1020/cm3, and the concentration is increased relative to 4 x 1020/cm3 in the conventional diffusion. This is advantageous for the ohmic contact in the electrode region, thereby reducing the series resistance Rs and increasing the fill factor FF; and the junction depth is about 50 nm. Because the second deposition driven-in is shallower, the surface concentration in the non-electrode region is 5.43 x 1019/cm3 when the second deposition is etched away and a sheet
0 resistance is maintained at about 150 ohm, which is much lower than the concentration of 9 x 1019/cm3 (comparative embodiment 1) attained after etching in traditional diffusion. The recombination current of the corresponding emitter is greatly reduced, and the efficiency is increased.
Embodiment 2
Step 1: A first low-temperature deposition was performed for 10 min at a temperature of 760°C, a nitrogen flow rate of 11 slm, an oxygen flow rate of 200 seem, and a phosphorus oxychloride flow rate of 400 seem.
Step 2: A first drive-in was performed for 45 min by heating to 900 °C at a heating rate of 10°C/min while the nitrogen flow rate was maintained at 11 slm, the oxygen flow rate was maintained at 800 seem, and the phosphorus oxychloride flow rate was stopped, to form a low surface-concentration layer n+
Step 3: The temperature was reduced to 820°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 11 slm, and the oxygen flow rate was stopped; and a second deposition was performed for 25 min at a nitrogen flow rate of 11 slm, an oxygen flow rate of 300 seem, and a phosphorus oxychloride flow rate of 600 seem.
Step 4: A second drive-in was performed for 25 min by maintaining the temperature at 820°C while the nitrogen flow rate was maintained at 11 slm, the oxygen flow rate was maintained at 850 seem, and the phosphorus oxychloride flow rate was stopped, to form a high-concentration layer n++.
Step 5: The temperature was reduced to 700°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 11 slm, and the oxygen flow rate was maintained at 1800 seem, and then the silicon chip was removed from the boat.
Step 6: The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected portion, and finally the protective paste was washed away, to produce an emitter having high open circuit voltage and good contact.
1
The emitter obtained by the doping method is independently and accurately controlled by the first and second drive-in; and the finally formed emitter is consistent in parameters with the drive-in processes, that is, the depth of the non-electrode region is 0.5 pm, and the concentration is 4 x 1019; and the depth of the electrode region is 40 nm, and the concentration is 6 x 1020.
Embodiment 3
Step 1: A first low-temperature deposition was performed for 3 min at a temperature of 800°C, a nitrogen flow rate of 15 slm, an oxygen flow rate of 280 seem, and a phosphorus oxychloride flow rate of 560 seem.
Step 2; A first drive-in was performed for 30 min by heating to 850°C at a heating rate of 10°C/min while the nitrogen flow rate was maintained at 15 slm, the oxygen flow rate was maintained at 1100 seem, and the phosphorus oxychloride flow rate was stopped, to form a low surface-concentration layer n+.
Step 3: The temperature was reduced to 810°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 15 slm, and the oxygen flow rate was stopped; and a second deposition was performed for 15 min at a nitrogen flow rate of 15 slm, an oxygen flow rate of 450 seem, and a phosphorus oxychloride flow rate of 850 seem.
Step 4: A second drive-in was performed for 15 min by maintaining the temperature at 810°C while the nitrogen flow rate was maintained at 15 slm, the oxygen flow rate was maintained at 1150 seem, and the phosphorus oxychloride flow rate was stopped, to form a high-concentration layer n++.
Step 5: The temperature was reduced to 680°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 15 slm, and the oxygen flow rate was maintained at 2200 seem, and then the silicon chip was removed from the boat.
Step 6; The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected
2 portion, and finally the protective paste was washed away, to produce an emitter having high open circuit voltage and good contact.
The emitter obtained by the doping method is independently and accurately controlled by the first and second drive-in; and the finally formed emitter is consistent in parameters with the drive-in processes, that is, the depth of the non-electrode region is 0.45 pm, and the surface concentration is 4.5 x 1019; and the depth of the electrode region is 45 nm, and the surface concentration is 5.5 x 1020.
Comparative Embodiment 1
Step 1: A first low-temperature deposition was performed for 5 min at a temperature of 785°C, a nitrogen flow rate of 13 slm, an oxygen flow rate of 250 seem, and a phosphorus oxychloride flow rate of 500 seem.
Step 2: A drive-in was performed for 40 min by heating to 860°C at a heating rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1000 seem, and the phosphorus oxychloride flow rate was stopped.
Step 3: The temperature was reduced to 700°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the oxygen flow rate was maintained at 2000 seem, and then the silicon chip was removed from the boat, to complete the phosphorous diffusion.
Step 4: The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected portion, and finally the protective paste was washed away.
The depth of the non-electrode region is 0.35 pm, the surface concentration is 9 x 1019, the depth of the electrode region is 60 nm, and the surface concentration is 4 x 1020.
Comparative Embodiment 2
Step 1: A first low-temperature deposition was performed for 10 min at a temperature of 785°C, a nitrogen flow rate of 13 slm, an oxygen flow rate of 500 seem, and a phosphorus oxychloride flow rate of 1000 seem.
Step 2: A drive-in was performed for 50 min by heating to 840°C at a
3 heating rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1500 seem, and the phosphorus oxychloride flow rate was stopped.
Step 3: The temperature was reduced to 790°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the oxygen flow rate was maintained at 1800 seem, and then the silicon chip was removed from the boat, to complete the phosphorous diffusion.
Step 4: The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected portion, and finally the protective paste was washed away.
The depth of the non-electrode region is 0.4 pm, the surface concentration is 1.5 x 1020, the depth of the electrode region is 55 nm, and the surface concentration is 3.5 x 1020.
Comparative Embodiment 3
Step 1: A first low-temperature deposition was performed for 5 min at a temperature of 785°C, a nitrogen flow rate of 13 slm, an oxygen flow rate of 250 seem, and a phosphorus oxychloride flow rate of 500 seem.
Step 2: A first drive-in was performed for 20 min by heating to 860°C at a heating rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1000 seem, and the phosphorus oxychloride flow rate was stopped, to form a low surface-concentration layer n+.
Step 3: The temperature was reduced to 830°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the oxygen flow rate was stopped; and a second deposition was performed for 20 min at a nitrogen flow rate of 13 slm, an oxygen flow rate of 400 seem, and a phosphorus oxychloride flow rate of 800 seem.
Step 4: A second drive-in was performed for 18 min by maintaining the temperature at 830°C while the nitrogen flow rate was maintained at 13 slm, the oxygen flow rate was maintained at 1000 seem, and the
4 phosphorus oxychloride flow rate was stopped, to form a high-concentration layer n++.
Step 5: The temperature was reduced to 700°C at a cooling rate of 10°C/min while the nitrogen flow rate was maintained at 13 slm, and the 5 oxygen flow rate was maintained at 2000 seem, and then the silicon chip was removed from the boat.
Step 6: The electrode region was protected by printing a protective paste, chemical etching was performed to etch away the unprotected portion, and finally the protective paste was washed away.
The surface concentration of the electrode region is 5.55 x 1020/cm3, and the junction depth is about 50 nm; however, the surface concentration of the non-electrode region is increased and is as high as 9.43 x 1019/cm3, and the depth is 0.45 pm.
The test results of cell performance are shown in Table 1.
Table 1. Cell performance parameters
| Voc | Jsc | FF | Eff | |
| (mV) | (mA /cm2) | (%) | (%) | |
| Comparative Embodiment 1 | 683.9 | 39.81 | 80.52 | 21.92 |
| Comparative Embodiment 2 | 683.5 | 39.87 | 80.41 | 21.89 |
| Comparative Embodiment 3 | 680.2 | 39.54 | 80.12 | 21.54 |
| Embodiment 1 | 686.7 | 39.93 | 80.78 | 22.15 |
| Embodiment 2 | 687.9 | 39.87 | 80.82 | 22.17 |
| Embodiment 3 | 686.3 | 39.91 | 80.79 | 22.12 |
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| CN112133784A (en) * | 2019-06-06 | 2020-12-25 | 国家电投集团西安太阳能电力有限公司 | Method for preparing N-type FSF structure IBC solar cell based on photoetching mask method |
| CN110473938A (en) * | 2019-08-08 | 2019-11-19 | 山西潞安太阳能科技有限责任公司 | A kind of novel alkali throwing selective emitter making technology |
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| CN114068759A (en) * | 2020-07-30 | 2022-02-18 | 一道新能源科技(衢州)有限公司 | Phosphorus doping method of P-type crystalline silicon battery |
| CN111883420A (en) * | 2020-08-05 | 2020-11-03 | 中国科学院半导体研究所 | Thermal diffusion method for improving activation rate of phosphorus-doped and boron-doped surface layer of crystalline silicon |
| CN111916347B (en) * | 2020-08-13 | 2023-03-21 | 中国电子科技集团公司第四十四研究所 | Phosphorus diffusion doping method for SOI (silicon on insulator) wafer |
| CN114188436B (en) * | 2020-09-15 | 2024-03-15 | 一道新能源科技股份有限公司 | Silicon substrate preparation method and solar cell |
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