NL171942C - Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een halfgeleiderlichaam een menglaag van nitriden van silicium en germanium wordt aangebracht. - Google Patents

Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een halfgeleiderlichaam een menglaag van nitriden van silicium en germanium wordt aangebracht.

Info

Publication number
NL171942C
NL171942C NLAANVRAGE7613799,A NL7613799A NL171942C NL 171942 C NL171942 C NL 171942C NL 7613799 A NL7613799 A NL 7613799A NL 171942 C NL171942 C NL 171942C
Authority
NL
Netherlands
Prior art keywords
semicon
manufacturing
semiconductor device
semiconductor
semiconductor body
Prior art date
Application number
NLAANVRAGE7613799,A
Other languages
English (en)
Other versions
NL171942B (nl
NL7613799A (nl
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP1402776A external-priority patent/JPS5298473A/ja
Priority claimed from JP2515076A external-priority patent/JPS52109371A/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of NL7613799A publication Critical patent/NL7613799A/nl
Publication of NL171942B publication Critical patent/NL171942B/nl
Application granted granted Critical
Publication of NL171942C publication Critical patent/NL171942C/nl

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/318Inorganic layers composed of nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/26Web or sheet containing structurally defined element or component, the element or component having a specified physical dimension
    • Y10T428/263Coating layer not in excess of 5 mils thick or equivalent
    • Y10T428/264Up to 3 mils
    • Y10T428/2651 mil or less
NLAANVRAGE7613799,A 1976-02-13 1976-12-10 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een halfgeleiderlichaam een menglaag van nitriden van silicium en germanium wordt aangebracht. NL171942C (nl)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1402776A JPS5298473A (en) 1976-02-13 1976-02-13 Thin film material
JP2515076A JPS52109371A (en) 1976-03-10 1976-03-10 Manufacture of semiconductor device

Publications (3)

Publication Number Publication Date
NL7613799A NL7613799A (nl) 1977-08-16
NL171942B NL171942B (nl) 1983-01-03
NL171942C true NL171942C (nl) 1983-06-01

Family

ID=26349907

Family Applications (1)

Application Number Title Priority Date Filing Date
NLAANVRAGE7613799,A NL171942C (nl) 1976-02-13 1976-12-10 Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een halfgeleiderlichaam een menglaag van nitriden van silicium en germanium wordt aangebracht.

Country Status (3)

Country Link
US (1) US4126880A (nl)
DE (1) DE2705902C3 (nl)
NL (1) NL171942C (nl)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4631234A (en) * 1985-09-13 1986-12-23 Texas Instruments Incorporated Germanium hardened silicon substrate
US5882961A (en) * 1995-09-11 1999-03-16 Motorola, Inc. Method of manufacturing semiconductor device with reduced charge trapping
JP4441109B2 (ja) * 2000-12-08 2010-03-31 株式会社ルネサステクノロジ 半導体装置の製造方法
US20050287747A1 (en) * 2004-06-29 2005-12-29 International Business Machines Corporation Doped nitride film, doped oxide film and other doped films
US8729635B2 (en) * 2006-01-18 2014-05-20 Macronix International Co., Ltd. Semiconductor device having a high stress material layer

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3558348A (en) * 1968-04-18 1971-01-26 Bell Telephone Labor Inc Dielectric films for semiconductor devices
US3542572A (en) * 1968-06-24 1970-11-24 Corning Glass Works Germania-silica glasses

Also Published As

Publication number Publication date
DE2705902A1 (de) 1977-08-18
US4126880A (en) 1978-11-21
NL171942B (nl) 1983-01-03
DE2705902B2 (de) 1979-07-12
DE2705902C3 (de) 1980-03-20
NL7613799A (nl) 1977-08-16

Similar Documents

Publication Publication Date Title
NL7703224A (nl) Werkwijze voor het vervaardigen van een transis- torinrichting, alsmede een aldus vervaardigde transistorinrichting.
NL7609815A (nl) Werkwijze voor het vervaardigen van een half- geleiderinrichting en halfgeleiderinrichting vervaardigd met behulp van de werkwijze.
NL7707424A (nl) Geintegreerd ketenpakket en werkwijze voor het vervaardigen van zulk een pakket.
NL189633C (nl) Werkwijze voor het vervaardigen van een monolithische, geintegreerde micro-elektronische halfgeleiderketen.
NL176818C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL7810373A (nl) Werkwijze voor het vervaardigen van een halfgeleider- inrichting.
NL190255C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting, omvattende een halfgeleiderlichaam met ten minste een uit het oppervlak van het halfgeleiderlichaam uitstekend elektrodelichaam van polykristallijn silicium.
NL7506594A (nl) Werkwijze voor het vervaardigen van een halfge- leiderinrichting en halfgeleiderinrichting ver- vaardigd met behulp van de werkwijze.
NL187508B (nl) Werkwijze voor het vervaardigen van halfgeleiderinrichtingen.
NL190770C (nl) Inrichting voor het produceren van een siliciumoxidelaag op halfgeleiderplaatjes.
NL7604986A (nl) Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze.
NL7700521A (nl) Werkwijze voor het vervaardigen van een con- servenblik en inrichting voor de uitvoering van deze werkwijze.
NL186478C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL7613893A (nl) Halfgeleiderinrichting met gepassiveerd opper- vlak, en werkwijze voor het vervaardigen van de inrichting.
NL176416C (nl) Werkwijze voor het vervaardigen van een thermo-electrische halfgeleiderinrichting.
NL7812385A (nl) Werkwijze voor het vervaardigen van een halfgeleider- inrichting.
NL186048C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting met twee passiveringslagen.
NL7608923A (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL188668C (nl) Werkwijze voor de vervaardiging van een halfgeleiderinrichting.
NL188774C (nl) Werkwijze voor het vervaardigen van een samengestelde halfgeleiderinrichting.
NL7609607A (nl) Werkwijze voor het vervaardigen van een half- geleiderinrichting en halfgeleiderinrichting vervaardigd met behulp van de werkwijze.
NL188124C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting van het ladinggekoppelde type.
NL7505134A (nl) Werkwijze voor het vervaardigen van een half- geleiderinrichting.
NL7710635A (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
NL171942C (nl) Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een halfgeleiderlichaam een menglaag van nitriden van silicium en germanium wordt aangebracht.

Legal Events

Date Code Title Description
V1 Lapsed because of non-payment of the annual fee

Effective date: 19950701