NL122607C - - Google Patents

Info

Publication number
NL122607C
NL122607C NL122607DA NL122607C NL 122607 C NL122607 C NL 122607C NL 122607D A NL122607D A NL 122607DA NL 122607 C NL122607 C NL 122607C
Authority
NL
Netherlands
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication date
Application granted granted Critical
Publication of NL122607C publication Critical patent/NL122607C/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0641Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
    • H01L27/0647Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
    • H01L27/0652Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185Joining of semiconductor bodies for junction formation
    • H01L21/187Joining of semiconductor bodies for junction formation by direct bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1203Rectifying Diode
    • H01L2924/12036PN diode
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/012Bonding, e.g. electrostatic for strain gauges
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
NL122607D 1961-07-26 NL122607C (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2686961 1961-07-26

Publications (1)

Publication Number Publication Date
NL122607C true NL122607C (fr) 1900-01-01

Family

ID=12205283

Family Applications (2)

Application Number Title Priority Date Filing Date
NL281360D NL281360A (fr) 1961-07-26
NL122607D NL122607C (fr) 1961-07-26

Family Applications Before (1)

Application Number Title Priority Date Filing Date
NL281360D NL281360A (fr) 1961-07-26

Country Status (3)

Country Link
US (1) US3239908A (fr)
DE (1) DE1193169B (fr)
NL (2) NL122607C (fr)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3320485A (en) * 1964-03-30 1967-05-16 Trw Inc Dielectric isolation for monolithic circuit
US3393349A (en) * 1964-04-30 1968-07-16 Motorola Inc Intergrated circuits having isolated islands with a plurality of semiconductor devices in each island
US3383760A (en) * 1965-08-09 1968-05-21 Rca Corp Method of making semiconductor devices
DE1230915B (de) * 1965-03-26 1966-12-22 Siemens Ag Verfahren zum Herstellen von integrierten Halbleiterbauelementen
US3355636A (en) * 1965-06-29 1967-11-28 Rca Corp High power, high frequency transistor
US3387193A (en) * 1966-03-24 1968-06-04 Mallory & Co Inc P R Diffused resistor for an integrated circuit
JPS6051700A (ja) * 1983-08-31 1985-03-23 Toshiba Corp シリコン結晶体の接合方法
EP0161740B1 (fr) * 1984-05-09 1991-06-12 Kabushiki Kaisha Toshiba Procédé pour la formation d'un substrat semi-conducteur
US4649627A (en) * 1984-06-28 1987-03-17 International Business Machines Corporation Method of fabricating silicon-on-insulator transistors with a shared element
JPS6173345A (ja) * 1984-09-19 1986-04-15 Toshiba Corp 半導体装置
JPH0770474B2 (ja) * 1985-02-08 1995-07-31 株式会社東芝 化合物半導体装置の製造方法
JP2559700B2 (ja) * 1986-03-18 1996-12-04 富士通株式会社 半導体装置の製造方法
US4704785A (en) * 1986-08-01 1987-11-10 Texas Instruments Incorporated Process for making a buried conductor by fusing two wafers
US5266135A (en) * 1990-02-07 1993-11-30 Harris Corporation Wafer bonding process employing liquid oxidant
DE69114531T2 (de) * 1990-02-07 1996-04-25 Harris Corp Löten von Wafern unter Verwendung von eingeschlossenem oxydierendem Dampf.
US5747857A (en) * 1991-03-13 1998-05-05 Matsushita Electric Industrial Co., Ltd. Electronic components having high-frequency elements and methods of manufacture therefor
US5668057A (en) * 1991-03-13 1997-09-16 Matsushita Electric Industrial Co., Ltd. Methods of manufacture for electronic components having high-frequency elements
US6909146B1 (en) 1992-02-12 2005-06-21 Intersil Corporation Bonded wafer with metal silicidation
JPH06291587A (ja) * 1992-07-08 1994-10-18 Matsushita Electric Ind Co Ltd 圧電振動子
JPH06350371A (ja) * 1993-06-10 1994-12-22 Matsushita Electric Ind Co Ltd 圧電デバイスの製造方法
US5521434A (en) * 1994-10-17 1996-05-28 International Business Machines Corporation Semiconductor chip and electronic module with integrated surface interconnects/components
US6525335B1 (en) 2000-11-06 2003-02-25 Lumileds Lighting, U.S., Llc Light emitting semiconductor devices including wafer bonded heterostructures

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2996799A (en) * 1953-05-21 1961-08-22 Hans Sickinger Method of manufacturing multi-layered tube
NL219101A (fr) * 1956-10-31 1900-01-01
US2995686A (en) * 1959-03-02 1961-08-08 Sylvania Electric Prod Microelectronic circuit module
US2990500A (en) * 1959-03-16 1961-06-27 Square D Co Electronic module
US3050843A (en) * 1959-04-15 1962-08-28 Bell Telephone Labor Inc Method of bonding metallic members
US3091849A (en) * 1959-09-14 1963-06-04 Pacific Semiconductors Inc Method of bonding materials

Also Published As

Publication number Publication date
NL281360A (fr) 1900-01-01
US3239908A (en) 1966-03-15
DE1193169B (de) 1965-05-20

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