MXPA05007617A - Un metodo para utilizar un diseno de muestreo sincronizado en un modo de muestreo de velocidad fija. - Google Patents

Un metodo para utilizar un diseno de muestreo sincronizado en un modo de muestreo de velocidad fija.

Info

Publication number
MXPA05007617A
MXPA05007617A MXPA05007617A MXPA05007617A MXPA05007617A MX PA05007617 A MXPA05007617 A MX PA05007617A MX PA05007617 A MXPA05007617 A MX PA05007617A MX PA05007617 A MXPA05007617 A MX PA05007617A MX PA05007617 A MXPA05007617 A MX PA05007617A
Authority
MX
Mexico
Prior art keywords
synchronous
sampling mode
signal processing
fixed
rate
Prior art date
Application number
MXPA05007617A
Other languages
English (en)
Inventor
Bouillet Aaron
Original Assignee
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa filed Critical Thomson Licensing Sa
Publication of MXPA05007617A publication Critical patent/MXPA05007617A/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/455—Demodulation-circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Picture Signal Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
  • Television Systems (AREA)

Abstract

La presente invencion en general se relaciona con aparatos, tal como aparatos de procesamiento de senal de television que procesan senales de frecuencia de radio. Mas en particular, la presente solicitud es particularmente util en circuitos integrados que deben combinar circuiteria que opera en un modo de muestreo sincronizado, que se debe adaptar para usarse con una aplicacion de modo de muestreo de velocidad fija. De conformidad con una modalidad ejemplificativa, el aparato 100 de procesamiento de senal de television comprende una fuente de senal 220 digital de velocidad fija, una circuiteria 240 de procesamiento de senal que opera en un modo de muestreo sincronizado, en donde la circuiteria 240 de procesamiento de senal comprende una senal que representa una velocidad de simbolo, y un interpolador 230 para procesar la senal digital de velocidad fija para producir muestras a la velocidad de simbolo.
MXPA05007617A 2003-01-17 2004-01-20 Un metodo para utilizar un diseno de muestreo sincronizado en un modo de muestreo de velocidad fija. MXPA05007617A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US44073403P 2003-01-17 2003-01-17
PCT/US2004/001581 WO2004066355A2 (en) 2003-01-17 2004-01-20 A method for using a synchronous sampling design in a fixed-rate sampling mode

Publications (1)

Publication Number Publication Date
MXPA05007617A true MXPA05007617A (es) 2005-09-30

Family

ID=32771855

Family Applications (1)

Application Number Title Priority Date Filing Date
MXPA05007617A MXPA05007617A (es) 2003-01-17 2004-01-20 Un metodo para utilizar un diseno de muestreo sincronizado en un modo de muestreo de velocidad fija.

Country Status (8)

Country Link
US (1) US7583802B2 (es)
EP (1) EP1588263A4 (es)
JP (1) JP4652323B2 (es)
KR (1) KR101105129B1 (es)
CN (1) CN1723444B (es)
BR (1) BRPI0406733A (es)
MX (1) MXPA05007617A (es)
WO (1) WO2004066355A2 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007537675A (ja) * 2004-05-13 2007-12-20 トムソン ライセンシング クロック発生器及びその方法
US7899135B2 (en) * 2005-05-11 2011-03-01 Freescale Semiconductor, Inc. Digital decoder and applications thereof
US7894560B2 (en) * 2005-09-22 2011-02-22 Freescale Semiconductor, Inc. Pilot tracking module operable to adjust interpolator sample timing within a handheld audio system
US7697912B2 (en) * 2005-09-22 2010-04-13 Freescale Semiconductor, Inc. Method to adjustably convert a first data signal having a first time domain to a second data signal having a second time domain
US20100323648A1 (en) * 2007-11-28 2010-12-23 Haruka Takano Demodulation device, reception device, and demodulation method
CN106101484A (zh) * 2016-06-15 2016-11-09 乐视控股（北京）有限公司 电视机芯片同步控制方法及相关装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3943346A (en) * 1974-07-22 1976-03-09 Rca Corporation Digital interpolator for reducing time quantization errors
US4856030A (en) * 1988-07-20 1989-08-08 Itt Defense Communications Apparatus and methods of locking a receiving modem to a transmitting modem employing a burst signal
US5588025A (en) * 1995-03-15 1996-12-24 David Sarnoff Research Center, Inc. Single oscillator compressed digital information receiver
US5943369A (en) * 1996-02-27 1999-08-24 Thomson Consumer Electronics, Inc. Timing recovery system for a digital signal processor
US5878088A (en) * 1997-04-10 1999-03-02 Thomson Consumer Electronics, Inc. Digital variable symbol timing recovery system for QAM
US6128357A (en) * 1997-12-24 2000-10-03 Mitsubishi Electric Information Technology Center America, Inc (Ita) Data receiver having variable rate symbol timing recovery with non-synchronized sampling
DE60018246T2 (de) * 1999-05-26 2006-05-04 Koninklijke Philips Electronics N.V. System zur übertragung eines audiosignals
KR100669403B1 (ko) * 2000-05-04 2007-01-15 삼성전자주식회사 브이에스비/큐에이엠 공용 수신기 및 수신방법
US7088388B2 (en) * 2001-02-08 2006-08-08 Eastman Kodak Company Method and apparatus for calibrating a sensor for highlights and for processing highlights
US7050419B2 (en) * 2001-02-23 2006-05-23 Terayon Communicaion Systems, Inc. Head end receiver for digital data delivery systems using mixed mode SCDMA and TDMA multiplexing

Also Published As

Publication number Publication date
BRPI0406733A (pt) 2005-12-20
CN1723444A (zh) 2006-01-18
EP1588263A4 (en) 2006-09-27
US20060192895A1 (en) 2006-08-31
KR20050090080A (ko) 2005-09-12
CN1723444B (zh) 2010-08-11
WO2004066355A3 (en) 2004-11-11
WO2004066355A2 (en) 2004-08-05
EP1588263A2 (en) 2005-10-26
JP4652323B2 (ja) 2011-03-16
KR101105129B1 (ko) 2012-01-16
US7583802B2 (en) 2009-09-01
JP2006518952A (ja) 2006-08-17

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