MXPA00005629A - Peak to peak signal detector for audio system - Google Patents

Abstract

A peak to peak detector circuit for use in an audio system comprises a first amplifier having an input terminal for receiving an L+R AC audio signal and an output terminal which is serially coupled to a resistor in series with a capacitor for generating a variable dc voltage having a time vs. amplitude relationship corresponding to the input L+R AC audio signal. A clamping diode having a cathode electrode coupled to a reference potential and having an anode electrode coupled to the capacitor operates to limit negative amplitude excursions associated with the variable dc voltage to a predetermined minimal value. A rectifying diode having a cathode electrode coupled to the anode electrode of the clamping diode, and an anode electrode coupled to a second capacitor to charge the second capacitor responsive to the amplitude of said variable dc voltage operates to produce a dc output signal proportional to the peak amplitude of said L+R audio signal.

Description

PEAK PEAK SIGNAL DETECTOR FOR AUDIO SYSTEM RELATED REQUESTS This application is related to the provisional patent application Series No. 60 / 067,807, filed on December 8, 1997, entitled "Peak to Peak Signal Audio Compressor Detector" (Peak to Peak Signal Detector for Audio Compressor), the content of which is hereby incorporated by reference in its entirety.

FIELD OF THE INVENTION The present invention relates generally to the field of audio systems having signal detection devices for detecting audio signals and more particularly, to a peak-to-peak signal detector for detecting dual channel L + R stereo audio signals.

BACKGROUND OF THE INVENTION Broadcasting of multi-channel or stereo sound programs for television in the United States is in accordance with the system adopted by the Television Broadcast Systems Committee (BTSC) of the Electronic Industries Association (EIA). , according to its acronym in English). This multi-system television sound system provides the transmission of the sum of the left and right stereo audio information (L + R) in a main audio channel in the spectrum space of the television signal formerly occupied by the signal monophonic audio (mono). This was done so that the new stereo signals could be compatible with servers with existing monophonic television receivers. The multi-channel television sound systems also provide the transmission of the difference of left and right stereo audio information (L-R), modulated on a subcarrier. The large multi-channel sound systems employed in current consumer electronic audio units such as television receivers in combination with strong sound effects recorded on media including high-fidelity VHS video tapes and laser discs contribute to the audio signals that They have extensive dynamic scale characteristics. Such dynamic scale capability of the system is usually an attractive aspect in home / theater audio / video systems currently on the market and generally contributes to the quality and entertainment of the listener. However, although this may be true in general, sounds consisting of transient signals of great amplitude can be annoying and cause excessive noise. This may be undesirable in certain cases, such as when the children are sleeping. Not surprisingly, under these circumstances, it is desirable to include an automatic dynamic volume control compression system to limit wide-scale dynamic operation on a scale of audio signals. Accordingly, first said audio signals of positive and negative amplitude must be detected and accurately tracked in order to perform dynamic volume control processes. A peak signal detector can be used to detect a peak amplitude associated with an audio signal and used to provide a detector voltage, which can then be used to control a volume setting in order to limit the sound intensity indicative of a transient signal of high amplitude. However, audio signals are usually asymmetric. Therefore, the examination and detection of only one of the portions of an audio signal (AC) may result in the detection of a peak that may be too small (or too large) and thus, an correct representation of the transient signal amplitude. That is, if a positive peak detector is used to detect an AC audio signal, then detection of only positive passing signals may occur. For transient negative excursion signals, the positive peak detector may be unable to detect these negative transient signals, and therefore allow the strong signal to be received and compressed by the television receiver unit, resulting in an undesirably loud audio signal perceived by the listener. The use of precision rectifiers and amplifiers to detect signal amplitudes of both polarities can be used to detect both positive and negative AC signals. However, said rectifiers tend to be a bit complex and require a relatively larger number of electronic components to implement the functions. This is an undesirable characteristic for a circuit that is to be included within an electronic unit for the consumer, such as a television receiver, in the current highly competitive market. For this reason, television manufacturers have sought a highly reliable and low-cost alternative to accurately detect audio signals of both positive and negative amplitude in order to perform dynamic volume control processing to limit wide-scale audio. dynamic.

COMPENDIUM OF THE INVENTION According to the present invention, a peak-to-peak detector circuit for use in an audio system comprises a first amplifier having an input terminal for receiving an audio signal L + R (AC) and an output terminal, which is coupled in series to a resistor in series with a capacitor to generate a variable voltage having a time versus amplitude ratio corresponding to the audio signal L + R AC. A level-setting diode having a cathode-electrode coupled to a reference potential and having an anode-electrode coupled to the capacitor operates to limit excursions of negative amplitude associated with the variable voltage to a predetermined minimum value. A rectifying diode having a cathode-electrode coupled to the anode-electrode of the level-setting diode, and an anode-electrode coupled to a second capacitor for charging the second capacitor responsive to the amplitude of said variable voltage operates to produce a signal of output proportional to the peak-to-peak signal of said audio signal L + R. The detector circuit further comprises a clamping circuit sensitive to the voltage value at the anode-electrode of the rectifying diode to set the output signal to a maximum value.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 shows a schematic circuit diagram for a peak-to-peak detector for an audio system according to the present invention. Figures 2A-C illustrate various waveforms resulting from the operation of the circuit of Figure 1 and represent the audio signal amplitudes L and R of input and output voltages associated with the added audio signals L and R. Figure 3 illustrates a block diagram of a volume control system employing the peak-to-peak detector circuit of Figure 1 according to the present invention.

DETAILED DESCRIPTION OF THE INVENTION Figure 1 shows a detector circuit 10 according to the present invention for an audio compressor system of a television receiver, such as an MM101 audio system manufactured by Thomson Consumer Electronics, Inc., the assignee of the present. Note that through the drawings, similar reference numbers are used to indicate similar parts. Note also that, while Figure 1 illustrates supply voltages and component values associated with resistive and capacitive circuit elements corresponding to a working mode of the detector circuit of the present invention, said values are merely illustrative, and it is understood that a person skilled in the art can make adjustments to the component values and supply voltages according to the requirements associated with an application. As shown in Figure 1, the detector circuit 10 is a peak-to-peak detector, which forms an output signal of 100 at the output terminal 90 in response to the stereo audio signal components L + R (en said signal AC) of a multi-channel sound signal output of a processor module 20. The amplitude of the output signal of 100 is proportional to the sum of the peak-to-peak amplitudes of the input audio signals of channel L and R. The peak-to-peak detector circuit operates to detect both positive and negative portions of the audio signal L + R AC input, since for many audio waveforms these are asymmetric. In this way, the detector circuit 10 operates to detect both passing signals that are positive and negative while using a minimum number of electronic components to provide an efficient, low cost detector. The detector output can be sampled through an audio system microprocessor to control the setting of the volume control of the audio system. Still referring to Figure 1, left (L) and right (R) stereo audio channels are applied to the inversion or sum input (leg 2) of the operational amplifier AC U 1 -A through the resistors R1 and R2, respectively. The non-reversing input (leg 3) of the amplifier U1-A is coupled to the supply voltage Vc through the resistor R5. The output signal at the output terminal 1 of the amplifier U1-A consists of the inverted sum of the signals L + R. The resistor R6 is coupled between the output terminal 1 and the inverting terminal 2 of the amplifier U1-A for provide negative feedback to the amplifier for linear operation. The output terminal 1 is also coupled to a first resistor terminal R3, the second terminal of which is coupled to a positive terminal of the capacitor C1. That is, the resistor-capacitor combination R3 and C1 is coupled in series with each other. The level clamping diode CR1 has the anode-electrode coupled to the negative terminal of the capacitor C1 and the cathode-electrode coupled to potential to reference or to ground. The signal (L + R) is passed through the resistor L3 and the capacitor C1, where it is set by the diode CR1. The clamping circuit consists of the RC combination of R3 and C1 and the level clamping diode CR1 operates to force the negative portion L + R of the signal to always operate at a diode drop below the reference potential (i.e. potential to ground). As illustrated, the signal (L + R) at node 80 is now a variable DC signal, having substantially the same time versus amplitude ratio as the original audio signal, as seen on an oscilloscope, except for the DC offset . The signal at the anode 80 has a minimum voltage of about -O.ßvdc (corresponding to a diode voltage drop) and a maximum voltage of the peak-to-peak amplitude of the signal L and R minus the aforementioned diode drop . This limits the excursions of negative amplitude associated with the variable voltage signal 40 to a predetermined minimum value of -0.6v. The diode CR2 is coupled between the fixing circuit arrangement of the diode CR1 at the node 80 and the detector output of the node 90, which forms a time constant circuit 30 comprising the capacitor C2 and the resistor R4 in parallel. The variable signal 40 at node 80 passes through diode CR2 and charges capacitor C2 when the voltage at node 80 exceeds the voltage at node 90 by a diode drop. The time constant associated with the capacitor charge C2 is determined largely by the resistor value R3. When the input audio signal L + R is converted to an amplitude of zero, the capacitor begins to discharge through the resistor R4 according to the time constant R2xC4. In order to respond quickly to positive or negative transient signals in the L + R signal, the capacitor charging time C2 must be considerably shorter than the discharge time of C2. Accordingly, the resistor values associated with R3 and R4 are chosen so that the resistor R4 is considerably greater than the corresponding value associated with the value R3. Such resistor values give the detector a "fast attack / slow decay" characteristic typical of many audio detectors. Although numerous resistor / capacitor combinations can be used according to the particular requirements of the system, in the preferred embodiment, a 20: 1 ratio of resistor values (R4 / R) is preferred. Note that the capacitor discharge time C2 is also determined by the input impedance of the microprocessor 110, which is typically very high, relative to the resistor R4. In this way, the resistor R4 represents the dominant discharge impedance. Referring to Figure 1 together with Figure 3, the fast attack / slow decay detector voltage 100 can be applied to the input of the analog to digital converter (AD) of the audio system microprocessor 110. The fixing circuit 50 (Figure 1) comprising a unit gain operational amplifier U1-B and the diode CR3 operates to limit or fix the maximum amplitude of the output signal 100 to a predetermined upper limit. The voltage output at terminal 7 of amplifier U1-B is determined by the voltage at its input without inversion (for 5). This voltage is generated as a result of a voltage divider R7 and R8 to divide the power supply voltage of Vp between the two resistors. Capacitor C3 that operates in parallel with resistor R7 acts as a filter. The output voltage of the amplifier U1-B is, therefore, fixed according to its input voltage on leg 5, thus providing a constant voltage at node 25. The leveling diode CR3 has the anode-electrode connected to the output leg 7 and the cathode- electrode connected to the anode of CR2 at the detector output terminal 90. This arrangement operates to set or limit the output voltage of the detector to a maximum value corresponding to the voltage in leg 7 (ie, node 25) plus the diode through the CR3 diode. That is, when the detector voltage at the node 90 reaches the output voltage of the amplifier U1-B plus a voltage drop of the diode, the diode CR3 conducts. Since the amplifier U1B is a low impedance device, the detector output is effectively limited. In the preferred embodiment, the output voltage amplitude of the detector is limited to approximately 5V through the fixing circuit consisting of the amplifier U1-B and the related circuit system. In this embodiment, the output of U1-B is set at approximately 4.3V so that when the detector voltage at node 90 reaches the amplitude of 4.3V plus a diode drop, diode CR3 conducts. In this way, the fixing circuit 50 can operate to protect the A / D converter within the microprocessor 110, which operates on a power supply of 5 volts. Since it is undesirable for the A / D converter to accept an input signal that exceeds an operating voltage of 5 volts, the clamping circuit operates to limit the output detector voltage to a voltage no greater than the operating voltage of the amplifier. processor operating to receive output DC signal 100. Referring to FIG. 3, the A / D converter samples the detector voltage signal of 100 within a predetermined time scale of 5-10 msec. The microprocessor then uses the sampled input to make processing decisions based on the sampled detector voltage amplitude. The processor uses these decisions to control the volume by setting the volume control controlled by the computer's microcomputer, such as the MM101 audio system. That is, the processor compares the absolute amplitude of the sampled signal voltage 100 with a predetermined threshold and will reduce or adjust the volume control in proportion to the relative difference. As previously mentioned, peak-to-peak detection is used in order to detect both positive and negative portions of the ac audio signal, since for many audio waveforms the amplitudes are asymmetric. Note that with respect to the detector circuit of Figure 1, if a positive forward pass signal leaves the amplifier U1-A in leg 1, the positive forward pass signal will rapidly advance toward the diode CR2. Similarly, the capacitor C2 will charge rapidly if the positive forward pulse has a high amplitude and, therefore, the detection of the positive forward passive pulse occurs in a relatively short period. When the capacitor C2 is fully discharged, if a negative forward pass pulse is removed on the leg of the amplifier U1-A, the diode CR2 can not conduct since the voltage at node 80 does not exceed the voltage at node 90. consequently, the detector does not respond immediately to the negative forward pass signal by charging capacitor C2. Rather, diode CR1 will conduct, and capacitor C1 will begin to charge. Accordingly, negative transient signals require an L + R waveform signal of sufficient period to charge the capacitor C1 to allow the detector output to produce a signal amplitude to provide peak-to-peak amplitude. the signal L + R. Figures 2C, 2B and 2C represent illustrative waveform diagrams showing the detector processing described above. Referring now to Figure 2A together with Figure 1, waveform 1 represents a peak-to-peak signal of 4.5 volts with a deviation of 2.5 volts. Waveform 2 is a peak-to-peak signal of 2.4 volts with a deviation of 0.2. These signals are indicative of the right and left stereo audio channel signals (R and L), respectively. The variable signal output at node 80 (see Figure 1) is indicated by each of the waveforms represented as waveform # 3.

This is the sum of the peak-to-peak voltages of waveforms # 1 and # 2. Waveform # 3 of Figure 2A represents the variable voltage at node 80 with limiting circuit 50 disabled. Therefore, the positive peak voltage of the sum is + 6.3v, while the negative peak voltage goes down to -0.6v. Figure 2B illustrates the same group of waveforms shown in Figure 2A, this time with the limiting circuit 50 + 5v of Figure 1 enabled. In this case, the peak of waveform # 3 of the summed L + R signal is shown set at a peak of 5.0v, with a peak-to-peak voltage of 5.6v. The clamping circuit of CR1 operates to produce a minimum voltage level of -0.6v as also shown in Figure 2A. Figure 2C illustrates a second pair of input waveforms indicative of the left and right stereo audio channel signals, wherein each signal is an identical 2v pico-peak signal having no deviation from. The signal waveform summed L + R # 3 in this way is a peak-to-peak 4v signal, having peak values of +3.4 and -0.6v. Although not illustrated in Figures 2A, 2B, 2C, one can determine that the amplitude values of at node 90 are represented by the positive peak value of summed waveforms # 3 minus the 0.6 diode drop across of the CR2 diode. Note that during operation within a volume control system of an audio device such as a television receiver, as shown in Figure 3, the peak-to-peak detector outputs the voltage signal from a terminal of output, which can be connected to a processor such as a microcontroller having an A / D converter to convert the output signal to a series of digital samples. The processor operates in response to these digital samples to control the volume in order to eliminate the high amplitude transient signal characteristics associated with a strong audio L + R signal such as an explosion, a cannon shot, a gun shot , and similar. The compression of this signal occurs through software controls of the digitally controlled volume controller. Note that the detector circuit described herein can be used in a variety of audio systems, which include television receivers used in presentation devices (commonly known as televisions), as well as television receivers without a display device such as a VCR . It should also be noted that some FM radios have the ability to receive and reproduce television sound signals. As such, the peak-to-peak detector modalized in the present invention can be used in said FM radios as an input to a processor for controlling the volume in response to the peak-to-peak amplitudes of the left and right stereo audio channel signals.

Claims (20)

1. - A peak-to-peak detector circuit for use in a television receiver, the circuit comprising: means for receiving a left (L) and right (R) audio channel signal and forming an audio signal L + R indicative of the sum of left and right stereo audio channel signals; fixing means sensitive to the audio signal L + R to generate a variable signal having a time and amplitude relation corresponding to said audio signal L + R, wherein the fixing means limit a minimum amplitude associated with said signal variable to a predetermined minimum value; and rectifying means sensitive to said variable signal to generate an output signal having an amplitude proportional to the sum of the peak-to-peak amplitude of said audio signal L + R.

2.- The detector circuit according to the claim 1, wherein the fixing means comprises a summing amplifier having an input terminal for receiving the audio signal L + R and an output terminal coupled to a first terminal of a resistor, a capacitor having first and second terminals, the first terminal coupled to a second terminal of said resistor, and the second terminal coupled to the anode-electrode of a diode.

3. The detector circuit according to claim 1, wherein the rectifying means includes a second capacitor coupled between a second diode and a reference potential, wherein when the second diode conducts, the second capacitor is charged in accordance with said output signal of.

4. The detector circuit according to claim 3, wherein the rectifying means further includes a second resistor in parallel with the second capacitor to form an operational discharge circuit for discharging said detector circuit according to a time value of discharge given when said ratio L + R is of an amplitude substantially zero.

5. The detector circuit according to claim 4, wherein the second capacitor is charged according to a given load time value.

6. The detector circuit according to claim 5, wherein the value of discharge time is substantially greater than the load time value.

7. The detector circuit according to claim 1, further comprising second fixing means for limiting a maximum amplitude associated with the output signal to a predetermined maximum value corresponding to a voltage no greater than an operating voltage. of a processor that operates to receive said output signal.

8. The detector circuit according to claim 7, wherein the second attachment means includes an amplifier to produce a constant output voltage to an output terminal, and a third diode having an anode-electrode coupled to the terminal of amplifier output, whereby the third diode conducts through the amplifier to limit the maximum voltage amplitude associated with the output signal when the voltage at the cathode-electrode of the third diode exceeds the output voltage of the amplifier by an amount Dadaist.

9. The detector circuit according to claim 8, wherein said given amount corresponds to the voltage drop through the third diode.

10. A peak-to-peak detector circuit for use in an audio system comprising: a first amplifier having an input terminal for receiving an audio signal L + R AC and an output terminal, which is coupled in series to a resistor in series with a capacitor to generate a variable voltage having a time versus amplitude ratio corresponding to said audio signal L + R AC input; a fixing diode having a cathode-electrode coupled to a reference potential and having an anode-electrode coupled to the capacitor to limit excursions of negative amplitude associated with the variable voltage to a predetermined minimum value; and a rectifying diode having a cathode-electrode coupled to the anode-electrode of the fixing diode, and an anode-coupled to a second capacitor for charging the second capacitor responsive to the amplitude of said variable voltage to produce an output signal of proportional to the peak-to-peak amplitude of said audio signal L + R.

11. The detector circuit according to claim 9, further comprising a limiting circuit sensitive to the voltage value at the anode-electrode of said rectifying diode. to set the output signal to a maximum value.

12. The detector circuit according to claim 10, wherein the maximum voltage value corresponds to a voltage no greater than an operating voltage of a processor that operates to receive the output signal.

13. The detector circuit according to claim 10, wherein the limiting circuit comprises a second amplifier coupled to a second leveling diode.

14. The detector circuit according to claim 12, wherein the second amplifier operates to generate a constant voltage at an output terminal, said second level-setting diode having an anode-electrode coupled to the second output terminal of the amplifier. and a cathode-electrode coupled to the anode-electrode of the diode of the rectification diode, whereby the second level-setting diode conducts through the second amplifier to limit the maximum amplitude associated with the output signal when the voltage at the anode -electrode of said rectifying diode exceeds the output voltage of the amplifier by the voltage drop across the second level-setting diode.

15. The detector circuit according to claim 12, wherein a charging time associated with the second capacitor is determined in accordance with parametric values associated with the first resistor and the second capacitor.

16. - A volume control system for controlling the level of the stereo audio signal L + R comprising: a peak-to-peak detector circuit including means for receiving the stereo audio signal L + R and generating a signal corresponding to a signal Stereo audio L + R inverted; a fixing circuit sensitive to said audio signal L + R for generating a variable signal having a time and amplitude relation corresponding to said audio signal L + R, wherein the clamping circuit limits a negative excursion of the signal from variable to a minimum voltage value; and rectifying means responsive to said variable signal to generate an output signal having an amplitude proportional to the sum of the peak-to-peak amplitude of said audio signal setting L + R; and a processor responsive to the output signal to compare the amplitude associated with the output signal with a threshold value to determine a difference value and adjust the amplitude associated with the stereo audio signal L + R according to the difference value.

17. The volume control system according to claim 16, wherein said peak-to-peak detector circuit further includes a limiting circuit for limiting a positive excursion of the output signal to a maximum voltage value.

18. The volume control system according to claim 17, wherein the processor comprises a microcomputer having an analog-to-digital converter for sampling the output signal at predetermined intervals, and a compressor for adjusting the amplitude associated with the stereo audio signal L + R according to the difference value.

19. The volume control system according to claim 18, wherein the maximum value corresponds to a voltage not greater than an operating voltage of said analog-to-digital converter operating to receive the output signal.

20. The volume control system according to claim 16, wherein said minimum voltage associated with the variable signal is substantially -0.6 volts.