JPS5846115B2 - clamp circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a clamp circuit for television video signals.

As is well known, a DC component is required in the television video signal to accurately reproduce the brightness of a television image, but it is impossible to transmit and amplify the DC component with a capacitively coupled amplifier. be.

For this reason, a clamp circuit is used as a DC component regeneration circuit that provides a DC component to the television video signal.

This clamp circuit is used not only in television receivers but also in magnetic recording and reproducing devices (hereinafter abbreviated as VTR).For example, it is used in the reproducing system of a two-head helical scan type VTR, in addition to the above purpose. used for various purposes.

In the normal playback state of a VTR, noises that occur below the sync level, such as spike noises that occur at the joint when the VC button is pressed and the head moves to the next track, and noise that occurs due to dropouts, are clipped at the sync level, and these noises are clipped at the sync level. In order to reduce the effect of noise on the synchronization of a VTR or television receiver, simple slow playback of the VTR,
In static playback, the vertical synchronization signal may be missing, so when a pseudo vertical synchronization signal is inserted into the playback signal from the outside, it is used to align the playback synchronization signal level and the pseudo synchronization signal level.

FIG. 1 shows an example of a clamp circuit conventionally used in a reproduction system of a VTR for the above-mentioned purpose.

In Figure 1, a signal input to terminal a is converted to low impedance by a buffer circuit consisting of an emitter follower circuit consisting of transistor T1 and current source ■1, and is transmitted from terminal A to C by capacitor C1. .

Now, when the potential of the terminal C is lower than the potential of the constant voltage source E1, a current flows through the diode D1, the capacitor C1 is charged, and the potential of the terminal C rises.

Conversely, when it is high, the diode is cut off and the resistor R1
, the capacitor C1 is discharged by the base current of the transistor T2, and the potential of one terminal C decreases.

Eventually, in either case, the potential of the terminal C approaches the potential of the constant voltage source E1, and by appropriately selecting the time constant for charging and discharging, the video signal is clamped.

By the way, today - television receivers and VTRs.

There is a demand for miniaturization and simplification of electronic equipment, and for this purpose, more advanced integration of electronic circuits is being promoted.

Considering the case of integrating this clamp circuit, if the conventional example shown in Fig. 1 is integrated into a single integrated circuit, in addition to the signal input/output terminal and the power supply ground terminal, there will be a capacitor C1, a discharge resistor R.
1 requires two terminals S and C.

In order to achieve high integration, it is desirable to reduce the number of terminals by at least one terminal, and the present invention utilizes power supply and ground terminals as terminals required for clamping capacitors and resistors, thereby reducing the number of terminals that must be newly provided. The object of the present invention is to provide a clamp circuit which has only one signal and can accurately insert a pseudo synchronization signal from the outside.

FIG. 2 shows one embodiment of the clamp circuit of the present invention.

2, the signal input to terminal a' is converted to low impedance by the first buffer emitter follower circuit consisting of transistor T3 and current source 8, as in the conventional example of FIG. '[Transmitted.

A nonlinear element D2 such as a diode, a resistor R2, and a capacitor C2 connected between the terminals b' and 07 constitute a peak detection circuit.

When the potential of terminal C' is higher than the potential of terminal b', diode D2 becomes conductive, capacitance C2 is discharged, and terminal C'
The potential of decreases.

Conversely, when the voltage is low, diode D2 is cut off and capacitance C2
is charged by the resistor R2, and the potential at the terminal C' rises.

Now, if the time constant determined by current source 3 and capacitor C2 is selected to be small, and the time constant determined by resistor R2 and capacitor C2 to be large and to an appropriate value, the potential of terminal C' will be equal to the minimum value of terminal b'. .

That is, peak detection is performed in the negative direction of the input signal.

Therefore, if a positive video signal including a synchronization signal is used as the human input signal, the potential at terminal C' will be at approximately the same level as the synchronization signal.

However, strictly speaking, since a voltage drop occurs in the diode D2, a potential difference that changes with temperature is generated between the terminals b' and C'.

However, this can be solved by selecting the current source ■4 appropriately.
This can be corrected by the second buffer emitter follower circuit composed of the current source 4 and the transistor T4.

Further, this transistor T4 has the effect of reducing the base current of the receiving transistor of the detection circuit, which causes an error in the charging time constant determined by R2 and C2.

Next, transistor T5. T6, resistance R3°R4, current I5. I6 constitutes a differential amplifier, and one of the input terminals of the differential amplifier has an input signal converted to a low impedance, and the other has a peak detected signal equal to the synchronization level of the input signal. signals are combined.

Therefore, a video signal whose synchronizing signal level is a constant potential is taken out from the output terminal d' of the differential amplifier.

Note that the clamp level at which the output button is pressed is determined by the resistance value r4 of the resistor R4 and the current value 15y16 of the current source 15yI6.

Now, ■ the power supply voltage. C, the operating range of the output of the differential amplifier is VCC to VCC-r4 (15+i6).

15''''16, the clamp potential is V.

Since it is Cr415, the output signal can only use half of the operating range.

Therefore, in order to effectively use the operating range, T5 > T
6, and it is necessary to change the balance of the current source appropriately.

The terminal f is an external synchronization signal (gate signal) input terminal, and when the potential is positive, a clamped video signal is output to the output terminal d', but when the potential is negative, the output potential is constant at the clamp level. An external synchronization signal will be inserted into the video signal.

That is, when the terminal f is at a positive potential, the transistor T7 is conductive, so that the connection point between the resistors R6 and R7 is grounded, the switch transistors T, T, T1.9 Tll are cut off, and the circuit operates as a clamp circuit.

When the terminal f becomes a negative potential, each switch transistor operates.

1. Current flows through the transistor T8 and the resistor R6 through the resistors R6y R7 and R8y Rg, and the transistor T3
At the same time as the base potential of the transistor T falls, the transistor T forming the first and second switching buffer circuits.

A voltage is applied to the base of 'I'to, transistor T3
is cut off, and transistor T9 becomes conductive.

Furthermore, the potential applied to the base of the transistor Tg e T100 is made larger than the peak detection value directed to the terminal C',
If the transistor T is set to a value that does not saturate, the same potential is applied to the bases of the transistors T5jT6 constituting the differential amplifier, and the same level as the clamp level appears at the output of the differential amplifier.

By the way, as described above, when the voltage drop of the diode D2 is canceled out by the transistor T4 and the synchronizing signal level and the detection output are made equal, the values of the current sources 3 and T4 are generally different.

Therefore, switch transistor T9. Since the voltage drop of T1o is different, it is necessary to correct this.

As a method of this correction, current source I3. There is a method of decreasing or increasing one or each of I4, but in this case, transistor 'I'it, resistor R, 1o [more than current source ■4
It explains how to increase the current.

As described above, in the clamp circuit according to the present invention, the capacitor C2 is connected between the terminal C' and the ground, the secondary resistor R2 is connected between the terminal C' and the power supply threshold, and the terminal specially provided for the clamp circuit is connected to the terminal e'. In addition, as mentioned earlier, the spike-like noise that occurs below the synchronization signal mixed into the input signal can be absorbed simply by appropriately selecting the value of the current source I3% capacitance C2. Furthermore, as a feature of the present invention, the external synchronization signal can be inserted accurately with respect to the synchronization signal level of the output signal, and the fluctuations of the clamp level and the external synchronization signal insertion level with respect to temperature are stabilized. I can do it.

Since a differential amplifier is used in the output stage, gain and signal level settings can be freely determined, and connection with the primary stage is easy.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a conventional clamp circuit, and FIG. 2 is an electric circuit diagram showing an embodiment of the clamp circuit of the present invention. a'...input terminal, b'...output terminal, e'...
Power terminal.

Claims (1)

[Claims] 1. A first buffer emitter follower circuit T3 that converts the impedance of a video input signal, and a differential amplifier T6 that has two input terminals, first and second, and amplifies the difference between the signals applied to both input terminals.゜T, has a tiger, said first
The output terminal of the buffer emitter follower circuit T3 and the first input terminal of the differential amplifier are coupled, and the output terminal of the first buffer emitter follower circuit T3 is connected between the output terminal of the ivy follower circuit and the second input terminal of the differential amplifier. A nonlinear element such as a diode and a second buffer emitter follower circuit T4 are inserted, and a capacitor C2 is inserted between the connection point of the nonlinear element and the second buffer emitter follower circuit and the AC grounding point. A charging/discharging current source or a resistor is connected to the connection point between the linear element D2 and its capacitor, and the output electrode of the first switching emitter follower circuit T is connected to the output electrode of the first buffer emitter follower circuit, and the second The output electrode of the switching emitter follower circuit T1o is coupled to the output electrode of the second buffer circuit T4, and the respective DC bias current circuits are made common, and the input electrode of the second switching emitter follower circuit T16yTll is connected to the output electrode of the second buffer circuit T4. A common gate signal is applied to , and depending on the presence or absence of this gate signal, the first and second buffer emitter follower circuits are simultaneously cut off or turned on, and the first and second switching transistors are simultaneously turned on or turned off. , depending on the presence or absence of the gate signal, the DC bias current circuits of the first switching emitter follower circuit and the first buffer emitter follower circuit, and the DC bias current circuits of the second switching emitter follower circuit and the second buffer emitter follower circuit. By increasing or decreasing each or one of the DC bias currents, the output terminal of the differential amplifier outputs an output signal obtained by clamping the input signal to a constant voltage when the gate signal is not present. The present invention provides a clamp circuit that extracts the constant DC voltage.