JPS60230775A - Agc circuit - Google Patents

Abstract

PURPOSE:To improve the sensitivity of weak electric field by using a comparator output to control charging and discharging currents, which generate a voltage proportional to the level of a video synchronizing signal, in an AGC circuit of peak-to-peak value type in a VIF block. CONSTITUTION:An IF signal input 1 from a tuner passes an IF amplifier 2 and a detector 4 and appears as a video detection output 25. This output 25 is amplified and is inputted to the base of a transistor TR6 of a differential amplifier. If the leading edge of the synchronizing signal of a video signal VB becomes lower than a base voltage VC of the TR6, discharging is stopped immediaely though a terminal voltage VA of a capacitor 18 is dropped. In the video period, the voltage VA rises because the video signal VB is higher than the voltage VC. In case of a weak electric field, if the voltage VA rises to exceed a voltage VD determined by the intersection between resistances 17 and 28, comparators 30 and 32 detect this state to make a TR29 conductive, and resistances 27 and 9 are connected in parallel, and a charging current i10 is increased, and the IF amplifier can have a maximum gain.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an AGC circuit in a VIF of a television receiver.

(Constitution of Conventional Example and its Problems) FIG. 1 shows a conventional VIP-AGC circuit and its peripheral block diagram. The IF signal from the cheese 1 is inputted and is amplified by the IF amplifier 2. In this amplifier, the 'r-in is controlled and the Ki and G inputs are controlled by applying voltage from the terminal 24.

The signal 3 amplified to a constant output is detected by the detector 4 and output to 25 as a video signal. It is further amplified by amplifier 5, and its output is applied as 8 to the next differential amplifier. One end of the differential amplifier composed of transistors 6 and 11 has a voltage V. The other end detects the leading edge of the synchronization signal of the signal VB. That is, when the detection output 25 becomes 2V, the synchronization signal tip voltage of the amplified -p signal VB becomes V. It's in line with that. Here, when the tip of the synchronization signal falls below VC, current flows to the collector of the transistor 11 and the capacitor 18
Discharge the charge from the Also, the potential other than the synchronization signal part of V is V. Since the current is higher than that of transistor 6, current flows through transistor 6 and resistor 7. Due to the potential drop across diode 8, resistor 9 and transistor 10 act as a current band, and the current flows to capacitor 18 and charges it. FIG. 2 shows this change in detail, and the terminal voltage VA of the capacitor rises and falls due to charging and discharging, as shown in FIG. 2(b). In particular, during the equivalent pulse period and the vertical synchronization period of the transmission video signal shown in FIG. 2(a), the manner in which the synchronizing signal is charged and discharged to and from the remote control amplifier 18, which have different pulse widths and numbers, also changes. That is, the signal period has a long interval between synchronizing signals, and charging/discharging is designed based on this period and remains constant, but when the equivalent pulse starts, the interval between synchronizing signals becomes narrower and the charging period becomes shorter. Then, the voltage vA of the capacitor 18 gradually decreases as shown in FIG. 2(b). Further, during the vertical synchronization pulse period, the charging/discharging period is reversed, and the value of (1)8 is particularly reduced. However, it does not go down gradually, but becomes constant in the middle.

It transfers this VB voltage to transistor 23. and resistance 22
, diode 21. This is to conduct key control by leading the signal from the terminal 24 to the IF amplifier via the Zener diode 20. When the IF large input from 1 becomes smaller, the detection output 25 also becomes smaller, and the synchronizing signal tip of the signal applied to the small transistor also becomes higher than vc. Then, the capacitor 18 is no longer discharged and the potential of the stain pressure vA is high. This voltage vA amplifies the gain of the II" amplifier and the detection output 25 of the detector 4 also increases and remains constant. ◎On the contrary, if the JF large input is large A
When the GC voltage decreases, the key of the fi IF amplifier decreases.

The AGC circuit operates in this way to keep the detection output 25 constant. However, as mentioned above, in this method, the AGC voltage drops in a part of the waveform (before and after the vertical synchronization pulse), so if the IF amplifier is controlled with this voltage, the detection output 25 will be as shown in Figure 2 (c) (not easy to understand). Therefore, the vertical synchronization period (as shown in the figure with negative polarity) decreases and faithful waveform reproduction is not possible. As a result, vertical synchronization becomes unstable, ghost detection using the first step pulse of the vertical synchronization pulse, and changes in the IF amplifier due to fluctuations in the AGC voltage cause a phase change in the SIF output, resulting in audible audio. SA deteriorates. One way to improve this problem is to make the resistor 19 in FIG. 1 smaller, but the detection output 25 at the time of a weak electric field deteriorates.

(Objective of the invention) The present invention eliminates the above drawbacks, maintains a faithful detected waveform,
This provides an AGC circuit that increases weak electric field sensitivity.

(Structure of the Invention) The present invention uses a comparator that detects the leading edge of a video synchronization signal and the output of the comparator to apply a voltage proportional to the level of the video synchronization signal to a capacitor and a resistor in a peak value type AGC circuit during VIP7' lock. It has a circuit that generates electricity by charging and discharging circuits connected in parallel, and is characterized by detecting the voltage and controlling the charging and discharging current to create a voltage proportional to the level of the video synchronization signal.
This configuration achieves the above object.

(Description of Embodiment) An embodiment of the present invention will be described below with reference to FIG. 3.

The IF signal input 1 from the tuner passes through the IF amplifier f2 and the detector 4 and appears as a video detection output 25.

Furthermore, it is amplified by the amplifier 5 and inputted to the base of the transistor 6 side of the differential amplifier consisting of transistors 6 and 11.

The voltage ■ applied to the sync signal tip of the video signal ■8 to the pace of the transistor 11. (The detection output 25 has a predetermined amplitude, for example, 2V.

) Transistor 11 is conductive, transistor 6 is cut off, and diode 8. No current flows through the resistor 7.9 or the transistor 10, and when the transistor 11 becomes conductive, the current flows as a discharge current from the capacitor 18, and the terminal voltage VAli of the capacitor 18 drops. However, the width of the horizontal synchronizing signal is less than 4 μsea L, and the discharge immediately stops. Next, the video signal VB enters the video period, but its voltage is higher than VC, so this time the transistor 6 conducts, a current j6 flows, and current flows through the resistors 7 and 9 (resistance 9 (resistance value R2) The flowing current '+o is determined by the resistance ratio of resistor 7 (resistance value R,) i,.-16x F
) and the transistor 10, a charging current is generated in the capacitor 18, and the voltage VA increases. However, part of the charging current is also shunted to the charging merging resistor 19. This video period is long and the charging voltage gradually increases. When the next horizontal synchronization signal comes, the discharge occurs again.The voltage remains constant, but the charging and discharging times mentioned above are different during the equivalent pulse period and the vertical synchronization pulse period, and the voltage drops, creating a step and causing harmful effects. bring. Therefore, as the charging shunt resistor 19 of the capacitor 18 is made smaller, the charging shunt increases, so the charging current to the capacitor 18 decreases. Then, when the vA level of the horizontal synchronization period is lowered, there is no difference in level from the vertical synchronization period, and the initial problem is reduced.

However, when the input of radio waves decreases, the AGC voltage VC rises, and the key of IF amplifier 2 is brought close to full, noise increases in the detection output 25, and the noise before and after the horizontal synchronization signal section causes the horizontal synchronization signal/ , 07 has a wider response width. Then, the discharge current increases because the charging and discharging to the capacitor 18 has been balanced, and the key of ■F has been controlled as described above. That is, the AGC voltage vA decreases and the input of the IF amplifier 02 does not reach its maximum value. The present invention detects, by controlling the transistors 30 and 32, that during this weak electric field, the voltage ■9 rises and the voltage ■□ exceeds the voltage VD determined by the intersection of the resistors 17 and 28, and makes the transistor 32 conductive. When the transistor 29 is also made conductive by the current, the resistance 27 (assumed to have a resistance value R3) increases to a resistance R20R5. Since the discharge current remains unchanged, the AGC voltage vA rises, and the IF amplifier can be brought to its maximum gain.

(Effects of the Invention) As described above, the present invention faithfully reproduces a video signal, reduces the instability of vertical synchronization, and improves the fidelity of ghost detection using the first step pulse of the vertical synchronization pulse and the AGC voltage. It is possible to prevent a change in the IF amplifier due to fluctuation from causing a phase change in the SIF output and cause audio Sβ deterioration, and to sufficiently increase the maximum sensitivity of the video detection output.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an AGC device in a conventional example, FIG. 2 is a waveform diagram for explaining the operation of FIG. 1, and FIG. 3 is a circuit diagram of an AGC device in an embodiment of the present invention. 2... IF antenna, 4... Detector, 5... Amplifier, 6°10.11, 29.30.32... Transistor, 7.9, 17, 27, 28... Resistor, 18...
Capacitor, 19... Charging shunt resistance. Figure 1

Claims (1)

[Claims] Peak value type AGC in the VIP television receiver
In the circuit, there is a converter that detects the leading edge of the video synchronization signal, and a circuit that generates a voltage proportional to the level of the video synchronization signal by charging and discharging a voltage proportional to the level of the video synchronization signal to a circuit connected in parallel with a capacitor and a resistor. An AGC circuit characterized by detecting the above voltage and controlling a charging/discharging current to create a voltage proportional to the level of a video synchronization signal.