JPS6139713A - Automatic gain control circuit - Google Patents

Abstract

PURPOSE:To make the amplitude of an output signal stable even if a sudden change is inflicted to an envelope of an input signal (read signal) by changing at least one of a charging time constant and a discharge time constant in response to an external signal so as to reduce the pull-in time of the read signal. CONSTITUTION:In the pull-in operation at the start of read (time T), an FET15 is turned off, the charging time constant is brought into a small value decided by a resistor 9 and a capacitor 10 so as to quicken the trancking to a level of the read signals c1, c2. As a result, the amplitude is clipped (saturated) in VCA output signals d1, d2 because the gain of a VCA7 is very fast at first but the amplitude is pulled in fast to a prescribed amplitude in response to the small charging time constant. After a prescribed time T from the start of read operation, the charge/discharge time constants are set larger by turning on the FET15. As a result the dip in the amplitude observed after the trailing edge of a projection of the envelope is decreased by the output signals d1, d2 of the VCA7.

Description

[Detailed Description of the Invention] (Technical Field) The present invention relates to a readout circuit in a storage device such as a magnetic disk device or a magnetic tape device, and more specifically, the present invention relates to a readout circuit in a storage device such as a magnetic disk device or a magnetic tape device. 0 Regarding a Stabilizing Automatic Gain Control Circuit (Prior Art) FIG. 1 is a schematic diagram of a general readout circuit for a magnetic storage device such as a magnetic disk device. This readout circuit consists of a magnetic field converter 1, a preamplifier 2, an automatic gain control circuit (hereinafter referred to as AGO) 3, a low-frequency F wave generator 4, a differentiator 5, and a comparator 6.
It consists of FIG. 2 is a circuit diagram of a conventional AGO, and FIG. 3 is an envelope diagram of signals of various parts of the AGO. This conventional AGO includes a voltage gain control amplifier (hereinafter referred to as VOA) 7, a rectifier 8, resistors 9, 11, a capacitor 10. It is composed of a reference power supply 12, a power supply, and a fan 13. The integrating circuit composed of resistors 9, 11 and →capacitor 10 outputs a differential signal bl+b! of voi7. The AGC is set to have a slight peak hold so that it follows the peak voltage value. The charging time constant determined by the resistor 9 and the capacitor 10 is sufficiently smaller than the discharging time constant determined by the resistor 11 and the capacitor 10.

In this conventional AGO, input differential signals “I+a,
improves the pull-in characteristic from the non-existent state to the existing state, and the output differential signal b1+b! of VOA7 is improved. In order to shorten the time it takes for the amplitude to reach a predetermined value from the saturation value, that is, the pull-in time, it is necessary to reduce the charging time constant. However, when the charging time constant is reduced, if the envelope of the input signal aI,a has a protrusion as shown in Figure 3, the output signals S, b, The amplitude decreases over a considerable period of time, and its recovery is delayed by a time determined by the discharge time constant. This decrease in the amplitude of the output signal b1+J deteriorates the SNR and increases the error rate in signal detection.

However, this amplitude drop can be easily reduced by making the charging time constant thicker and making it difficult for the AGO to follow the protruding envelope line shown in Fig. 3; however, if the charging time constant is increased, The retraction time will be delayed. Conventional AGOs had the above-mentioned drawbacks.

(Object of the Invention) An object of the present invention is to provide an automatic gain control circuit which has a short lead-in time for a read signal and can stabilize the amplitude of the output signal even if there is a sudden change in the envelope of the input signal (read signal). It's on offer.

(Structure of the Invention) The structure of the present invention is to provide an automatic gain control circuit that stabilizes the amplitude of a signal read from an information storage medium. a control amplifier, a rectifier that rectifies the output signal of the gain control amplifier, an integration circuit that charges the output current of the rectifier and discharges the charged charge, and generates the gain control signal according to the charging voltage of the integration circuit. The circuit is characterized in that the integration circuit is provided with means for changing at least one of a charging time constant and a discharging time constant in accordance with an external signal.

(Embodiment) Next, an embodiment of the present invention will be described, and the present invention will be described in detail with reference to the drawings of the embodiment. FIG. 4 is a circuit diagram of an embodiment of the present invention. This embodiment is used in a readout circuit of a magnetic storage device, and includes a voltage gain control amplifier 7, a rectifier 8, resistors 9 and 11, a capacitor 10, 14, a reference power supply 12, and a buffer amplifier 13. , FET15, and level converter 16. Differential output terminals of the VOAs 7 are each connected to differential input terminals of a rectifier 8, and an output terminal of the rectifier 8 is connected to a positive input terminal of a buffer amplifier 13 through a resistor 9. The positive input terminal of the buffer amplifier 13 is further grounded through a resistor 11 and also through a capacitor 10, and is connected to the drain terminal of an FET 15 through a capacitor 14, and the negative input terminal of the buffer amplifier 13 is connected to a reference power source 12. The negative terminal of the reference power supply 12 is grounded, the output terminal of the buffer amplifier 13 is connected to the gain control terminal of the VOA 7, and the gate terminal of the FET 15 is connected to the output terminal of the level converter 16. , the source terminals of FET15 are grounded.

5 to 7 are waveform diagrams of signals of various parts in the embodiment of FIG. 4. However, in FIGS. 6 and 7, the signal CI +
C2+ dI r dt is indicated by the envelope.

Next, the operation of this embodiment will be explained. The signal CI+02 input to the VOA 7 is a reproduction signal of the magnetic storage device and is a differential signal. The output signals d, , d of the VOA 7 are also differential signals, and are signals obtained by amplifying the input signals C1 and C2 with a gain corresponding to the voltage of the gain control terminal. The rectifier 8 double-wave rectifies the output signals d, , d of the VOA 7 to generate the waveform e shown in FIG.

If the FET 15 is on, this rectified signal e is transmitted to the resistor 9, the capacitor 10, the capacitor 14. ! :FET15
The charging time constant is determined by the on-resistance of resistor 11, capacitor 10, capacitor 14, and FET1.
The time constant determined by the on-resistance of 5 is integrated and smoothed as the discharge time constant. The ratio between the discharging time constant and the charging time constant is set large so that the voltage of the smoothed signal f follows the peak voltage of the output signal e of the rectifier 8. The buffer amplifier 13 applies a voltage proportional to the potential difference between the smoothed signal f and the reference power supply 12 to the gain control terminal of the VOA 7. The level converter 16 converts the time constant switching signal i at the TTL level into a signal g at a level that allows the FET 15 to be turned on and off. The time constant switching signal i is sent to the magnetic storage device,
This is a signal whose level changes in synchronization with the selection of the mode. For reading, the selection time point is the start time t1 of the read operation, and the time constant switching signals i and g change from high potential to low potential at time t, which is T=4.5 μs behind t.

According to this embodiment, as shown in FIG. 6, in the pull-in operation at the start of the read operation (time T), the FET
15 is turned off, the charging time constant is set to a small value determined by the resistor 9 and the capacitor 10, and the read signal CI+'! to follow the level faster.

As a result, the VOA output signals d,, d, are initially VOA
Since the gain of No. 7 is very large, the amplitude dips (saturates), but it quickly reaches a predetermined amplitude corresponding to the small charging time constant. By turning on the FETI 5 a predetermined time T after the start of the read operation, the charging/discharging time constant is set to a large value.

Therefore, even if a signal C1+C2 having a protruding envelope line such as the seventh one due to non-uniformity of the magnetic film in the recording medium is input to the VOA7 during normal reading, the charging time constant force j
Since it is large, the smoothed signal f, a2 voltage, - is small, and VO
Changes in the gain control signal of A7 can be kept small. As a result, the output signal d8. of VOA7. In d, it is possible to reduce the dip in the amplitude seen after the trailing edge of the protrusion of the wrapping line. dl, d, in this figure 7.
The waveform of blyb! is shown in Figure 3. The difference between this embodiment and the conventional example can be clearly seen by comparing it with . In addition, the broken line in FIG. 3 and FIG. 7 shows the wrapping line when there is no protrusion.

In this embodiment, as explained above, since the time constant of the integrating circuit provided in the feedback circuit is switched between the start of the read operation and the normal read operation, the read signal can be pulled in at high speed, and the read signal The amplitude of the output signal is stable even if there is a protruding amplitude fluctuation in
<, the error rate in signal readout is low.

(Effects of the Invention) According to the present invention, as explained above, the readout signal pull-in time is short, and even if there is a sudden change in the envelope of the readout signal, an automatic gain is achieved in which the amplitude of the output signal is stable. Control circuit can be provided.

[Brief explanation of the drawing]

Figure 1 is a diagram showing a general readout circuit of a magnetic recording device, Figure 2 is a circuit diagram of a conventional automatic gain control port, and Figure 3 is an envelope of signals for each part of the circuit in Figure 2. line diagram,
FIG. 4 is a circuit diagram showing one embodiment of the present invention, and FIGS. 5 to 7 are waveform diagrams of various signals in the embodiment of FIG. 4. 1... To magnetic field, 2... Preamplifier, 3... □ Automatic gain control circuit, 4...
...Low-range r-wave generator, ...Differentiator, 6...
... Comparator, 7 ... Voltage gain control amplifier, 8-
... Rectifier, 9, 11 ... Resistor, 10,
14...Capacitor, 12...Reference power supply, 13...Ba, fan amplifier, 15...
・FIT, 16...Level converter. Potato I listening oL17! /! 32VCA mechanical foot, 2″ width ≧1 3rd
figure

Claims (1)

[Claims] An automatic gain control circuit that stabilizes the amplitude of a signal read from an information storage medium includes a gain control amplifier that amplifies the read signal with a gain corresponding to a gain control signal received at a gain control terminal, and an output signal of the gain control amplifier. It consists of a rectifier that rectifies the current, an integrating circuit that charges the output current of the rectifier and discharges the charged charge, and a circuit that generates the gain control signal according to the charging voltage of the integrating circuit. An automatic gain control circuit comprising means for changing at least one of a time constant and a discharge time constant in accordance with an external signal.