JPS5828961B2 - AGC method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention uses an AGC method, particularly in a magnetic disk device, to reduce signal amplitude fluctuations caused by variations in head efficiency, non-uniformity of the medium, instability of head flying characteristics, or changes over time in circuit elements. The present invention relates to an automatic amplitude control method for absorption.

Conventionally, in the reading section of a magnetic disk device, AGC (
By using an automatic gain control method, the output amplitude is held constant and unwanted modulation is eliminated.

However, there are variations in magnetic heads, such as one head reading the same magnetization record at 1 mV and another at 1.4 mV, and there is also non-uniformity in the medium due to the density of the magnetic material applied to the disk. Furthermore, the air spring of the head is levitated from the disk surface by about 0.5 μm, and the disk moves about 50 μm, causing instability in the head flying characteristics.Also, the signal amplitude still varies due to changes in circuit elements over time. Fluctuations occur.

FIG. 1 is a block diagram showing the A()C method of a conventional magnetic disk drive, and FIG. 2 is a waveform diagram of a control signal based on the time constant of a filter with respect to the input waveform shown in FIG.

In FIG. 1, the input Vsi passed through the variable gain amplifier OCA is detected by the amplitude discriminator DET, and then passed through the low-pass filter LP to obtain the DC control voltage VAGO.
Take out the set target value■.

The gain of the variable gain amplifier OCA is controlled by the difference output from the output of the variable gain amplifier OCA.

Then, the control loop has the control voltage VAGO and the target value ■.

Respond so that the difference with b becomes zero.

However, especially when the interval between recorded bits becomes smaller,
The head is more susceptible to interference from adjacent bits, and the resolution of the magnetic head is limited, such as differences in signal amplitude between when data continues and when it does not, resulting in differences in amplitude depending on the data pattern ( (called pattern effect)
.

This is extremely inconvenient for AGC, which attempts to correct non-uniformity of heads, media, etc.

If you want to absorb amplitude fluctuations due to variations in head efficiency, non-uniformity of the medium, instability of head flying characteristics, changes in circuit elements over time, etc. without sensing amplitude differences due to data patterns, a low-pass filter is used. The first idea is to increase the time constant of LF.

However, when the time constant of the low-pass filter LP is increased, the control voltage VAGO becomes
The waveform becomes as shown by the dotted line A in the figure, and the ability to absorb modulation of the medium and the ability to keep the transient time short when the AGC loop is operating are extremely reduced.

On the other hand, when the time constant of the low-pass filter LP is made small, the control voltage VAGO has a waveform as shown by the solid line B in FIG. 2, and controlling the amplifier OCA with this waveform cannot be used because the waveform distortion becomes large.

In addition, when detecting the peak position of a signal using the amplitude discriminator DET as shown in Figure 3a, a resistor for discharging is required, so if there is no input waveform, the solid line B in Figure 2
As shown in the figure, the waveform decay is large, and the gain increases abnormally at, for example, an address mark (a mark indicating that data exists, and there is no magnetic flux reversal) on the magnetic disk.

Further, as shown by the solid line in FIG. 3, the characteristic curve of the voltage (2) of the diode D and the current IP is nonlinear, so the waveform is not transmitted correctly.

Of course, there is no problem if the characteristic curve is a one-dot line.

Furthermore, changes in the characteristics of the diode D itself due to temperature fluctuations also pose a problem.

The purpose of the present invention is to solve these problems by using an amplitude discriminator that is not sensitive to data patterns, thereby reducing the time constant of the low-pass filter and enabling high-speed response. The objective is to reduce the drop in the control signal waveform even when there is no signal, and to absorb amplitude fluctuations due to variations in head efficiency and non-uniformity of the medium.

Embodiments of the present invention will be described below with reference to the drawings.

Fig. 4 is a block diagram of the AGC system, and Fig. 5 a to e are the block diagram of the AGC system.
6 is a diagram for explaining each mode in FIG. 4, and FIGS. 7, 8, and 9 are diagrams for explaining the amplitude equalizer.

As shown in FIG. 4, the present invention provides an amplitude equalizer EQL at the next stage of the variable gain amplifier GCA in the AGC loop, and further connects the amplitude comparators CMP1 and CMP2 via the rectifier circuit RFC.
A discriminator/filter DET consisting of a charging/discharging and holding circuit
- Connected to LP (portion surrounded by a chain line).

A method in which an amplitude equalizer EQL is additionally installed in the AGC loop is proposed by the present inventors in Japanese Patent Application No. 52-1.
No. 58764 (see Japanese Patent Application Laid-open No. 54-91164)
It is also disclosed in the "AGc method".

The operation of the amplitude equalizer will be briefly explained with reference to FIGS. 8 and 9.

The input signal is applied to one input of the differential amplifier 7DIFAMP through a delay line DL having a delay time γ, and the signal with a delay time 2γ reflected back due to the high human power impedance is transmitted through a delay line DL having a delay time O. The signal then passes through an attenuator K and is applied to the other input of the differential amplifier DIFAMP.

Figures 9a and 9b are the input waveforms of the differential amplifier, and when these differences are taken, a signal with a small pulse width as shown in Figure 9c is obtained, and the signal level is equalized. Ru.

Such an amplitude equalizer, "IMPROVM
BNT OF' RECORDING DENSIT
Y BY MEANS 0FCO8INE EQUAL
IZER” IEEE Transa-ct 1oz
on Magnetics, Vol.
-12, No.

6, Nov. 1976, p. 746-748.

Therefore, when the signals ■ and i input to the amplifier OCA in FIG. input.

FIG. 5a shows the output waveform V e g of the amplitude equalizer EQL, and when rectified, the negative portion is inverted as shown by the dotted line.

The amplitude discrimination/control voltage generation circuit DET/LP in FIG. 4 includes two amplitude comparators CMP1 and CMP2, and a comparator CMP.
Switch SW1.2 controlled by the output of SW1.2;
It consists of two constant current sources I, , I2, a capacitor C, and a buffer amplifier BA.

The output Veg of the rectifier circuit REC is applied to the positive input of the comparator CMPI,2, and the AGC target level θ1 and intermediate level θ2 set as shown in FIG. 5a are applied to the negative input, respectively.
is added as a slice level.

Each output of the comparator CMPI,2 has a level θ1.
The current source ■1. is sliced at θ2 and appears as shown in FIG. ■Control 2.

As shown in FIG. 6, the outputs of both comparators CMP1 and CMP2 are 0.
”, it is a holding mode (mode I), and the terminal voltage of capacitor C is kept constant even if the time constant is small when there is no signal.

When only the output of one comparator CMP2 is 1'', a discharge circuit for the capacitor C is formed, so the terminal voltage of the capacitor C is lowered at a slope of 12/C (mode 2).

When the outputs of both comparators CMP1 and CMP2 are 1'', the difference current (
The capacitor C is charged at (II-I2), and (It I
2) Increase the terminal voltage with the slope of /C (mode ■
).

In this case, if 11:I2""n: 1, the slope in mode ■ is (n-1) of the slope in mode ■.
(However, the sign is opposite).

Therefore, if n=10 or so, the peak value of the output waveform Veg of the isovolume EQL will eventually be almost equal to the level θ1.

The pulse width of CMPl and CMP2 in Fig. 5 is 1:(n-
1), the charging and discharging of the capacitor C becomes zero, so in this way, the control voltage ■AGc is changed to the buffer amplifier B.
In addition to amplifier OCA from A, the gain of amplifier GCA is controlled.

In the present invention, θ1 is the target level of AGC, and since this is given by direct current, setting of the level is easy.

In that case, if there is an amplitude difference due to the pattern effect, the level θ1 input to the comparator CMP1.2 as shown in Figure 1.
．． Although it is impossible to set θ2, in the present invention, since the amplitude equalizer EQL is used, the control voltage VAGO is set as shown in FIG.
Complete control system allows precise control.

Since the peak levels are aligned in the amplitude equalizer EQL, the influence of waveform distortion is small even if the time constant is made small.

Furthermore, if the time constant is made too small, there is generally a waveform decay when there is no input signal, but in the present invention, this can be prevented by using the holding mode.

Therefore, the response of the AGC loop can be extremely fast, and amplitude fluctuations of, for example, 50 KHz can be almost absorbed.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional AGC system, and Figure 2 is a block diagram of a conventional AGC system.
FIG. 3a is a waveform diagram of a control signal for an input waveform according to the time constant of the low-pass filter shown in FIG. b is the amplitude discrimination circuit connection diagram and diode characteristic curve diagram of Fig. 1, Fig. 4 is a block diagram of the AGC system showing an embodiment of the present invention, and Fig. 5 a''-e are timing diagrams of each part in Fig. 4.
Figure 6 is an explanatory diagram of operation by mode, Figure 8 is an explanatory diagram of target level setting, Figure 8 is a schematic diagram of the amplitude equalizer used in the present invention, Figure 9 a `` c is Figure 8 It is an operation waveform diagram of OCA...variable gain amplifier, EQL...
・Amplitude equalizer, I) ET-LB...Amplitude discrimination filter, BA...Buffer amplifier, II
, I2... Constant current source, CMPI, 2...
...Amplitude comparator, θ1. θ2... Comparator slice level, C... Capacitor, RFC.
... Rectifier circuit, SWI, 2 ... Switch, DL ... Delay U1, DIFAMP
... Differential amplifier, VAG (3 ... Control signal voltage.

Claims (1)

[Claims] 1 A variable gain amplifier that changes the gain according to the control voltage, an amplitude equalizer that equalizes the output of the variable gain amplifier to sharpen the waveform, and an amplitude equalizer that changes the output of the amplitude equalizer at a first level. When there is a sliced output, a capacitor is charged by a first constant current, and when there is an output that sliced the output of the amplitude equalizer at a second level lower than the first level, the first constant current is lower than the first constant current. 2. An AGC system comprising amplitude discrimination/control voltage generation means for supplying, as the control voltage, a holding voltage of the capacitor obtained by discharging the capacitor with a constant current.