JP2814501B2 - Automatic gain control amplifier - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic gain control amplifier (hereinafter, referred to as an AGC amplifier) for amplifying a burst signal.

2. Description of the Related Art In recent years, communication via satellites has been actively performed, and the importance of an AGC amplifier for amplifying a burst signal so as to have a constant output has been increasing.

Hereinafter, a conventional AGC amplifier will be described with reference to the drawings.

FIG. 3 is an example of a circuit configuration diagram of a conventional AGC amplifier. In FIG. 1, reference numeral 1 denotes a variable gain amplifier, which comprises a variable attenuator 2 and an amplifier 3 whose attenuation increases as the output voltage of the error amplifier 6 increases. 4 is output,
And a power divider for distributing an output to the error amplifier 6. A distribution signal from the power divider 4 becomes a positive input voltage of the error amplifier 6 via a detector 5, and a resistor 8 is connected to a negative input terminal. , A reference voltage 9 corresponding to the output power is input. Further, a capacitor 11 of a resistor 10 is connected as a negative feedback circuit of the error amplifier 6, and an output thereof becomes a control voltage of the variable attenuator 2.

In the conventional AGC amplifier configured as described above, since the capacitor 11 for preventing abnormal transmission is connected to the output of the error amplifier 6, the signal Pin is input to the variable gain amplifier 1. It takes time until the desired output Pout is obtained after
As a result, there is a problem that the period in which the amplitude distortion occurs is long. Therefore, the present invention provides an AG having a short period in which amplitude distortion occurs.
It is intended to provide a C amplifier.

Means for Solving the Problems To achieve the above object, the present invention provides a variable gain amplifier and an AG for generating a control signal for automatically controlling the gain thereof.
A C circuit; and a means for determining the presence or absence of an input signal of the variable gain amplifier. The AGC circuit includes a first non-inverting type error amplifier connected in parallel to a negative feedback resistor of the error amplifier. A series connection of a capacitor and a second capacitor; and a means for clamping the output of the error amplifier so that the gain of the variable gain amplifier becomes a maximum or a gain close to the maximum for a fixed short period of time when an input signal is input. Means for changing the potential of the connection point of the first and second capacitors in a direction to increase the gain of the variable gain amplifier when an input signal is input for substantially the same time as the fixed short time. It was done.

Operation With the above-described configuration, the output voltage of the error amplifier rises by simultaneously changing the voltage between both ends of the capacitor after a lapse of a fixed period of time from the Pin input. Thus, the desired output level is set in a short time, and the period during which the amplitude distortion occurs is short.

Embodiment An embodiment of the present invention will be described with reference to FIG. 1 and FIG.

FIG. 1 is an example of a circuit configuration diagram of an AGC amplifier according to the present invention.

In FIG. 1, reference numeral 12 denotes a first power divider for distributing an input signal to a variable gain amplifier 13 and a first detector 14. The variable gain amplifier 13 is composed of a variable attenuator 15 having a characteristic that the attenuation is large when the control voltage from the error amplifier 19 is positively large and small when the control voltage from the error amplifier 19 is small, and an amplifier 16. Reference numeral 17 denotes an output and a second power divider for distributing a signal to the second detector 18. The signal from the second detector 18 becomes a positive input voltage of the non-inverting error amplifier 19, A second reference voltage 21 corresponding to a desired output level is input to the negative input terminal via a resistor 20. In parallel with the resistor 22 as a negative feedback circuit of the error amplifier 19,
A first capacitor 23 and a second capacitor 24 are connected in series, and an output of the transistor 25 is connected to a connection point between the first and second capacitors 23 and 24. Error amplifier
The output of 19 becomes the control voltage Va of the variable attenuator 15. Further, the output of the first detector 14 becomes the positive input voltage of the comparator 26, and the first reference voltage 27 is input to the negative input terminal. The output of the comparator 26 becomes the input of the transistor 25 via the capacitor 28, and is grounded via the resistor 29.
Similarly, the output of the comparator 26 is connected to the input of the transistor 31 via the capacitor 30 and is grounded via the resistor 32. The output of the transistor 31 is connected to the control terminal of the variable attenuator 15.

FIG. 2 shows an operation waveform diagram of the AGC amplifier shown in FIG. 1. In FIG. 2, an envelope waveform of an input signal of Vpin is shown, V + is a plus input terminal of the error amplifier 19, and V− is Negative input terminal. Va is a variable attenuator
15 is the control voltage, and Vpout is the envelope waveform of the output signal.

The operation of the AGC amplifier according to the present invention will be described with reference to FIGS.

When the input signal Pin is OFF, Vpin, V +, and Vpout become 0V.

When Pin is inverted to ON (point t1), Vpout becomes the maximum output because Va is 0V. At this time, since V + also has the maximum output, the output Va of the error amplifier 19 tends to increase. However, if Vpin is set to be higher than the first reference voltage 27, the comparator 2
The output of 6 is also inverted from “L” to “H”, and capacitor 30 and resistor 3
Va is 0 because transistor 31 is turned on with the time constant determined by 2.
Clamped to V. When Pin is inverted to ON, transistor 25 also has a time constant determined by capacitor 28 and resistor 29.
To turn ON, the potential at the connection point between the capacitors 23 and 24 is pulled in the negative direction (points t1 to t2).

Next, after a short period of time, when the transistors 25 and 31 are turned off at the point t2, the voltages of Va and V- increase by the voltage corresponding to the voltage difference between V + and V- at the point t2. I do. This voltage rise occurs in a very short time because the voltage across the capacitors 23 and 24 changes simultaneously. After that, Va is settled to a constant voltage corresponding to a desired Pout by the output driving capability of the error amplifier 19 and the circuit constants determined by the resistors 20, 22 and the capacitors 23, 24.

That is, if the ON time of the transistors 25 and 31 is set to a short time, the output Va of the error amplifier 19 immediately approaches Va corresponding to the desired Pout after a certain short time, so that the desired output after Pin ON as a whole is obtained. The time until it becomes Pout is shortened.

In this embodiment, the ON time of the transistors 25 and 31 is the same time, but the same effect can be obtained even if there is a slight time difference.

Effect of the Invention As described above, according to the present invention, from the OFF of Pin
At the time of inversion to ON, a desired output level can be obtained in a very short time. Therefore, according to the present AGC amplifier, amplification in which the period during which amplitude distortion occurs is extremely short can be performed. In particular, when a burst-like signal is amplified, the Pout setting time can be shortened for each burst, so that the effect of the present invention is great. Also, Pi
At the time of ON, since the filter effect is possessed by the capacitors 23 and 24, the operation of the AGC amplifier is stabilized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of an AGC amplifier according to the present invention, and FIG. 2 is an explanatory diagram of the operation of FIG. FIG. 3 is a circuit diagram of a conventional AGC amplifier. 1,13 …… variable gain amplifier, 2,15 …… variable attenuator, 3,16…
... Amplifier, 4,12,17 ... Power divider, 5,14,18 ... Detector, 6,19 ... Error amplifier, 8,10,20,22,29,32 ... Resistance,
9,21,27 ... Reference voltage, 11,23,24,28,30 ... Capacitor, 25,31 ... Transistor, 26 ... Comparator.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H04B 1/76-3/44 H04B 3/50-3/60 H04B 7/005-7/015 H03G 3 / 20-3/34 H04N 5/14-5/217

Claims (1)

(57) [Claims] A variable gain amplifier; an automatic gain control circuit (hereinafter, referred to as an AGC circuit) for generating a control signal for automatically controlling the gain; and a means for determining the presence or absence of an input signal of the variable gain amplifier. The AGC circuit includes a non-inverting type error amplifier, a series connection of a first capacitor and a second capacitor connected in parallel to a negative feedback resistor of the error amplifier, and a predetermined short time when an input signal is input. Means for clamping the output of the error amplifier so that the gain of the variable gain amplifier is at or near the maximum; and
Means for changing the potential of the connection point of the second capacitor in a direction to increase the gain of the variable gain amplifier.