JPS6087574A - Lamp circuit - Google Patents

Lamp circuit

Info

Publication number
JPS6087574A
JPS6087574A JP58195315A JP19531583A JPS6087574A JP S6087574 A JPS6087574 A JP S6087574A JP 58195315 A JP58195315 A JP 58195315A JP 19531583 A JP19531583 A JP 19531583A JP S6087574 A JPS6087574 A JP S6087574A
Authority
JP
Japan
Prior art keywords
signal
voltage
amplifier
input terminal
inverting input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58195315A
Other languages
Japanese (ja)
Inventor
Takashi Koga
古賀　隆史
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58195315A priority Critical patent/JPS6087574A/en
Publication of JPS6087574A publication Critical patent/JPS6087574A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/16—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level
    • H04N5/18—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level by means of "clamp" circuit operated by switching circuit

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Picture Signal Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To attain quick lamp operation when a signal is inputted after no signal by giving a different bias voltage applied to an inverting input terminal of an amplifier to an inverting input terminal of which a video signal is inputted depending on no signal and signal input. CONSTITUTION:When a signal is inputted to a clamp circuit (recording mode), a switch 9 is changed over to the position A, a bias voltage VB is applied to the inverting input terminal of the amplifier 1 and the clamp operation the same as a conventional circuit is attained. The switch 9 is changed over to the position B at no signal (reproduction mode) when no signal is inputted to the clamp circuit, the bias voltage VB is impressed to the inverting input of the amplifier 1 and the clamp operation is attained. In the changeover from no signal to signal input, a normal clamp output is outputted from the amplifier 1 quickly without any delay.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、テレビジ欝ン受像機やビデオテープレコーダ
等に用いられる映像信号をクランプするためのクランプ
回路−一る。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a clamp circuit for clamping a video signal used in a television receiver, a video tape recorder, etc.

〔発明の技術的背景〕[Technical background of the invention]

第１図はこの種のクランプ回路の一例を示した図である
。増幅器（利得＝１）１の反転入力端子には電圧源２が
発生讐暮バイアス電圧ＶＢが抵抗器＾ヶ介１．．Ｃ印加
５れ、壺よ、３ｙデｙヶ、ヶ介。FIG. 1 is a diagram showing an example of this type of clamp circuit. A voltage source 2 is generated at the inverting input terminal of the amplifier (gain=1) 1, and a bias voltage VB is applied to the resistor 1. ．． Apply C 5 times.

て同期負極性映像信号が入力されている。この増幅器１
の出力端子痣・らは同期正極性映像信号が出力される。A synchronous negative polarity video signal is input. This amplifier 1
A synchronous positive polarity video signal is output from the output terminals of the marks.

この同期正極性映像信号は比較器５０反転入力端子に入
力され、この比較器５の非反転入力ｉ子には基準電圧源
６が発生する基準電圧Ｖｒｅｆが印加されている。この
比較器５は抵抗器７とコンデンサ８から成るフィルタと
共にピーク検波回路を構成している。増幅器１が出力す
る同期正極性−像信号は前記ピーク検波回路によりその
同期信号先端が検波され、その検波出力が増幅器１の非
反転入力端子に帰還されている。このため、増幅器１の
出力端子に現われる同期正極性映像信号はその曲期先端
が基、準電圧’１ｒｅｆと同じ電圧にクランプされる。This synchronous positive polarity video signal is input to the inverting input terminal of the comparator 50, and the reference voltage Vref generated by the reference voltage source 6 is applied to the non-inverting input i terminal of the comparator 5. This comparator 5 constitutes a peak detection circuit together with a filter consisting of a resistor 7 and a capacitor 8. The leading edge of the synchronous positive polarity image signal outputted from the amplifier 1 is detected by the peak detection circuit, and the detected output is fed back to the non-inverting input terminal of the amplifier 1. Therefore, the synchronous positive polarity video signal appearing at the output terminal of the amplifier 1 is clamped at the same voltage as the reference voltage '1ref' at the leading edge of the period.

従って、増幅器１の非反転入力端子に印加される前記ピ
ーク検波回路の出力電圧は、増幅器１の出力端子での同
期先端電圧が比較器５の基準電圧Ｖｒｅｆと等しくなる
ように、反転入力端子に印加される同期負極性映像信号
の同期先端の電圧の変化に追従して変化する。ここで、
抵抗器７とコンデンサ８から成るフィルタの時定数及び
比較器５の出力電流ｉｏはピーク検波のみの性能から考
えると高速充電、低速放電み好ましいが、増幅器１の反
転入力端子に印加される同期負極性映像信号の同期先端
電圧変化への追従性能を考えると、放電時定数を大きく
する方に制限があり、又帰還回路の応答性から考えると
充電時定数を小さくする方にも制限が生じる。従って、
前記フィルタの抵抗値とコンデンサの容量値によって決
定される時定数及び比較器５の出力電流ｉｏは、通常上
記３点の兼ね合いから最適なものが選択される。Therefore, the output voltage of the peak detection circuit applied to the non-inverting input terminal of the amplifier 1 is applied to the inverting input terminal such that the synchronization tip voltage at the output terminal of the amplifier 1 is equal to the reference voltage Vref of the comparator 5. It changes in accordance with the change in the voltage at the synchronous tip of the applied synchronous negative polarity video signal. here,
Considering the time constant of the filter consisting of the resistor 7 and the capacitor 8 and the output current io of the comparator 5, fast charging and slow discharging are preferable considering the performance of peak detection only. Considering the ability to follow the synchronous tip voltage change of the digital video signal, there is a limit to increasing the discharging time constant, and considering the responsiveness of the feedback circuit, there is also a limit to decreasing the charging time constant. Therefore,
The time constant determined by the resistance value of the filter and the capacitance value of the capacitor and the output current io of the comparator 5 are usually selected optimally from the balance of the above three points.

ここで、上記従来のクランプ回路をビデオテープレコー
ダの記録系又は再生系のどちらか一方の経路に入れた場
合を考える。例えば記録経路に上記クランプ回路を挿入
した場合、記録時には上記□　クランプ動作を正常に行
なう。しかし、再生時にはこのクランプ回路への入力信
号が存在しないため、増幅器１に印加される入力バイア
ス電圧■に対して上記クランプ動作が行なわれ、増幅器
１の出力電圧が比較器５へ印加される基準電圧Ｖｒｅｆ
に等しくなるように動作する。その結果、増幅器１の非
反転入力端子に帰還されるピーク検波回路の出力電圧は
、記録時のクランプ動作における電圧よりも高い電圧と
なってしまう。Now, let us consider a case where the conventional clamp circuit described above is installed in either the recording system or the reproduction system of a video tape recorder. For example, when the above-mentioned clamp circuit is inserted into the recording path, the above-mentioned □ clamp operation is performed normally during recording. However, during playback, there is no input signal to this clamp circuit, so the above clamping operation is performed on the input bias voltage ■ applied to the amplifier 1, and the output voltage of the amplifier 1 is the reference applied to the comparator 5. Voltage Vref
It operates so that it is equal to . As a result, the output voltage of the peak detection circuit fed back to the non-inverting input terminal of the amplifier 1 ends up being higher than the voltage in the clamp operation during recording.

従って、ビデオテープレコーダを再生モードから記録モ
ードに切換えた時、増幅口１の非反転入力端子に印加さ
れる電圧が記録時の低い電圧（非反転入力端子に印加さ
れる同期負極性映像信号の同期先端電圧に追従した電圧
ンに戻るには、フィルタを構成するコンデンサ８を充電
しなければならず、この充電時間中は、正常なりランプ
動作が行なえないとい５欠点があった。　− 第２図は上記の動作を説明するものである。記録時にク
ランプ回路に印加される入力信号のバイアス電圧ＶＢに
対する平均直流電圧（ＡＦＬ）が大きいほど、増幅器１
の非反転入力端子における前記入力信号に応答するに必
要な電）ｌＥ変化量は大きくなる。第２図中囚は再生モ
ードから記録モニドヘ切換えた時の入力信号のＡＰＬが
バイアス電圧■に対して９０％の場合を示したものであ
り、矢印ａが前記非反転入力端子の電圧変化量である。Therefore, when the video tape recorder is switched from playback mode to recording mode, the voltage applied to the non-inverting input terminal of amplification port 1 is lower than the recording voltage (the voltage of the synchronous negative polarity video signal applied to the non-inverting input terminal). In order to return to the voltage that follows the synchronous tip voltage, the capacitor 8 that constitutes the filter must be charged, and during this charging time, normal lamp operation cannot be performed, which is a drawback. - Second The figure explains the above operation.The larger the average DC voltage (AFL) with respect to the bias voltage VB of the input signal applied to the clamp circuit during recording, the more the amplifier 1
The amount of change in voltage required to respond to the input signal at the non-inverting input terminal of the circuit increases. The middle figure in Figure 2 shows the case where the APL of the input signal when switching from the playback mode to the recording mode is 90% with respect to the bias voltage ■, and the arrow a indicates the amount of voltage change at the non-inverting input terminal. be.

第２図中兜で示したものは、入力信号のＡＦＬがバイア
ス電圧■に対し１：１０％の場合であり、矢印すは前記
非反転入力端子での電圧変化量を示している。但し、図
中符号ＶＢ下示したレベルは再生モードにおける増幅器
１の非反転入力端子電圧である。従って、再生モードか
ら記録モードに移る時に、入力信号のＡＰＬが大きい程
、増幅器１の非反転入力端子での電圧変化が太き（なり
、正常なりランプ出力が得られるまでの遅延時間が長（
なる。これはビデオテープレコーダにおける記録再生モ
ード切換え直後の画面乱れの原因となる。What is shown by the helmet in FIG. 2 is the case where the AFL of the input signal is 1:10% with respect to the bias voltage (2), and the arrow mark indicates the amount of voltage change at the non-inverting input terminal. However, the level shown below the symbol VB in the figure is the non-inverting input terminal voltage of the amplifier 1 in the reproduction mode. Therefore, when changing from playback mode to recording mode, the larger the APL of the input signal, the wider the voltage change at the non-inverting input terminal of amplifier 1 (the longer the delay time until a normal lamp output is obtained).
Become. This causes screen disturbances in the video tape recorder immediately after switching the recording/playback mode.

〔発明の目的〕[Purpose of the invention]

ら信号が入力された際に速やかにクランプ回路を開始し
えるクランプ回路を提供することにある。It is an object of the present invention to provide a clamp circuit that can promptly start the clamp circuit when a signal is input from the user.

〔発−の概要〕[Summary of departure]

本発明は、映−信号が反転入力端子に入力される増幅器
と、比較器及びフィルタから成ら、映像信号の同期先端
をピーク検波する次段のピーク検波回路とを有し、ピー
ク検波回路の検ｉ出力を前記増幅器の非反転入力端子に
帰還して、前記増幅器から同期先端がクランプされた映
像信号を出力するクランプ回路において、前記増幅器の
反転入力端子に印加するバイアス電圧を無信号時と信号
入力時とで変化させることにより、上記目的な達〔発明
の実施例〕 以下本発明のクランプ回路の一実施例を従来例と同一部
には同一符号を付して図面に従って説明する。第３図は
本発明のクランプ回路の一実施例を示した回路図である
。増幅器ｌの反転入力端子には、コンデンサ４を介して
入力信号（同期負極性映像信号）が入力されると共に、
抵抗器３及びスイッチ９を介して定電圧源２が発生する
バイアス電圧■又は定電圧源ｌＯが発生するバイアス電
圧■のどちらかが選択的に印加される。増幅器１の出力
は比較器５の反転入力端子に入力され、この比較器５の
非反転入力端子には基準電圧源６が発生する基準電圧Ｖ
ｒｅｆが印加されている。この比較器５は抵抗器７とコ
ンデンサ８から成るフィルタと共にピーク検波回路を構
成し゛、このピーク検波回路の検波出力が増幅器１の非
反転入力端子に帰還されている。The present invention has an amplifier into which a video signal is input to an inverting input terminal, and a next-stage peak detection circuit that includes a comparator and a filter and performs peak detection on the synchronization tip of the video signal. In a clamp circuit that feeds back the i output to a non-inverting input terminal of the amplifier and outputs a video signal whose synchronization tip is clamped from the amplifier, the bias voltage applied to the inverting input terminal of the amplifier is changed between when there is no signal and when there is no signal. Achieving the above object by varying the input voltage and input power (Embodiment of the Invention) An embodiment of the clamp circuit of the present invention will be described below with reference to the drawings, in which the same parts as those of the conventional example are denoted by the same reference numerals. FIG. 3 is a circuit diagram showing an embodiment of the clamp circuit of the present invention. An input signal (synchronous negative polarity video signal) is input to the inverting input terminal of the amplifier l via the capacitor 4, and
Either the bias voltage (2) generated by the constant voltage source 2 or the bias voltage (2) generated by the constant voltage source 10 is selectively applied via the resistor 3 and switch 9. The output of the amplifier 1 is input to the inverting input terminal of the comparator 5, and the reference voltage V generated by the reference voltage source 6 is input to the non-inverting input terminal of the comparator 5.
ref is applied. This comparator 5 constitutes a peak detection circuit together with a filter consisting of a resistor 7 and a capacitor 8, and the detection output of this peak detection circuit is fed back to the non-inverting input terminal of the amplifier 1.

次に本実施例の動作について説り」する。バイアス電圧
ＶＢは第１図の従来例と同一であり、増幅器１の反転入
力端子の平均直流電圧（ＡＰＬ）を決めている。従って
、入力信号が印加されると、増幅器１０反転入力端子に
おける信号の平均直流電圧（人ＰＬ）はＶＢとなる。一
方、バイアス電圧■は、バイアス電圧ＶＢに対して、５
０％のＡＦＬを持つ信号が入力された時の入力信号の同
期先端電圧と等しい値に設定されている。Next, the operation of this embodiment will be explained. The bias voltage VB is the same as the conventional example shown in FIG. 1, and determines the average DC voltage (APL) at the inverting input terminal of the amplifier 1. Therefore, when an input signal is applied, the average DC voltage (PL) of the signal at the inverting input terminal of the amplifier 10 is VB. On the other hand, the bias voltage ■ is 5% with respect to the bias voltage VB.
It is set to a value equal to the synchronization tip voltage of the input signal when a signal with an AFL of 0% is input.

このようなりランプ回路に信号が入力される信号入力時
（記録モード）には、スイッチ９はイ側に切換っており
、増幅器１の反転入力端子にバイアス電圧■を印加して
従来例と同様のクランプ動作を行なう。このクランプ回
路に信号が入力されない無信号時（再生モード）では、
スイッチ９は口側に切換わり、増幅器１の反転入力端子
にバイアス電圧りが印加され、このバイアス電圧−に対
してクランプ動作が行なわれる。即ち、スイッチ９は信
号入力時にはイ側に、無信号時には口側に図示されない
手段により切換わるよ５に設計されて（％る。When a signal is input to the lamp circuit (recording mode), the switch 9 is switched to the A side, and the bias voltage ■ is applied to the inverting input terminal of the amplifier 1, as in the conventional example. Perform the clamping operation. When there is no signal input to this clamp circuit (playback mode),
The switch 9 is switched to the open side, and a bias voltage (-) is applied to the inverting input terminal of the amplifier 1, and a clamping operation is performed on this bias voltage (-). That is, the switch 9 is designed so that it is switched to the A side when a signal is input and to the A side when no signal is input by a means not shown.

従って、無信号時から信号入力時に切換ゎ）た際に、入
力信号が５０％ＡＰＬの信号であれば、増幅器１０反転
入力端子では電圧変化が起らないことになる。この理由
は、無信号時での増幅器１の反転入力端子に印加される
直流電圧（バイアス電圧％　）が信号入力時における入
力信号の同期先端電圧と等しくなるためである。このた
め、増幅器ｌの非反転入力端子に帰還されているピーク
検波回路の検波出力電圧は信号入力時と無信号時とで等
しくなり、本実施例のクランプ回路は無信号時から信号
入力時に切換えた際に！全（遅延なく速やかに正常なり
ランプ出力を増幅器１かう出力することができる。Therefore, when switching from no signal to input signal, if the input signal is a 50% APL signal, no voltage change will occur at the inverting input terminal of the amplifier 10. The reason for this is that the DC voltage (bias voltage %) applied to the inverting input terminal of the amplifier 1 when no signal is present is equal to the synchronization tip voltage of the input signal when the signal is input. Therefore, the detection output voltage of the peak detection circuit, which is fed back to the non-inverting input terminal of amplifier l, is the same when a signal is input and when there is no signal, and the clamp circuit of this embodiment is switched from when no signal is input to when a signal is input. When! The amplifier 1 can immediately output a normal lamp output without any delay.

又、本実施例のクランプ回路においても、無信号時から
信号入力時に入力される信号のＡＩ’Ｌが上記の如くバ
イアス電圧ＶＢに対して５０チでない場合（通常１０〜
９０チ範囲で変化する）、無信号時から信号入力時に切
換えた際に、増幅器１が正常なりランプ出力を出すまで
に遅延時間が存在する。しかし、この遅延時間は以下に
述べる如〈従来例に比べて著しく小さくなっている。Also, in the clamp circuit of this embodiment, if the AI'L of the signal input from the time of no signal to the time of signal input is not 50 degrees with respect to the bias voltage VB as described above (usually 10 to
(varies in a range of 90 degrees), when switching from no signal to signal input, there is a delay time until the amplifier 1 becomes normal and outputs a lamp output. However, as described below, this delay time is significantly smaller than in the conventional example.

第４図囚、■、０は、上記の動作を脱刷する図である。FIG. 4, (2), 0 is a diagram showing the above-mentioned operation.

第４ｉ囚では無信号時から信号入力時への切換時の入力
信号のバイアス電圧ＶＢに対してＡＰＬが５０チであり
、増幅器１の非反転入力端子の電圧レベルは■で、前記
切換前後における電圧女動がない。第４図＠；は無信号
時から信号入力時への切換時の入力信号のＡＰＬがバイ
アス電圧ＶＢに対して９０％であり、増幅器１の非反転
入力端子の電圧レベルは、再生時の■から図中矢印Ｃで
示した如く変化する。この電圧変化後に正常なりランプ
動作が行なわれる。第４図０は無信号時から信号入力時
への切換時の入力信号のＡＦＬがバイアス電圧ＶＢに対
して１０％の場合であり、増幅器１の非反転入力端子の
電圧レベルは、再生時の■から図中矢印ｄで示した如く
変化する。この電圧変化の後に、正常なりランプ動作が
行なわれる。このように信号入力時の入力信号のＡＦＬ
が５０チでない場合、第４図０．０で示した如く図中矢
印ｃ、ｄで示した電圧変化が終了するまでの時間、本実
施例のクランプ回路も正常なりランプ動作を行なうこと
ができないが、第２図囚、■で示した従来例に比べて本
実施例の電圧変化量はいずれも半分以下となっている。In prisoner 4i, the APL is 50 with respect to the bias voltage VB of the input signal when switching from no signal to signal input, and the voltage level at the non-inverting input terminal of amplifier 1 is ■, before and after the switching. There is no voltage movement. In Fig. 4 @;, the APL of the input signal when switching from no signal to signal input is 90% of the bias voltage VB, and the voltage level of the non-inverting input terminal of amplifier 1 is It changes as shown by arrow C in the figure. After this voltage change, normal lamp operation is performed. Figure 4 0 shows the case where the AFL of the input signal when switching from no signal to signal input is 10% of the bias voltage VB, and the voltage level of the non-inverting input terminal of amplifier 1 is From ①, it changes as shown by arrow d in the figure. After this voltage change, normal lamp operation occurs. In this way, the AFL of the input signal when inputting the signal
If it is not 50 inches, the clamp circuit of this embodiment will not be able to perform normal lamp operation until the voltage changes shown by arrows c and d in the figure are completed as shown by 0.0 in Fig. 4. However, compared to the conventional example shown in Figure 2, the amount of voltage change in this example is less than half.

従って、無信号時から信号入力時に切換えた際に、本実
施例のりランプ回路では、いずれの場合にも速やかにフ
ラング出力を得ることができる。Therefore, when switching from no signal to signal input, the glue lamp circuit of this embodiment can quickly obtain a flag output in either case.

本実施例によれば、増幅器１０反転入力端子に印加され
るバイアス電圧を、スイッチ９によって無信号時には■
に、信号入力時には■に変化させることにより、無信号
時から信号入力時に切換えた際に、速やかに正常°なり
ランプ動作を行なうことができる。従って、無信号時か
らイム°号入力時に起きる画面の乱れを極めて少なくす
ることができるＯ 第５図は本発明のクランプ回路の他の実施例を示した回
路図である。この場合は、増幅器ｌの反転入力端子にス
イッチ１１を挿入し、このスイッチにより信号入力時は
ピーク検波回路の検出信号を非反転入力端子に印加する
よ５にし、無信号時（は定電圧源ｌＯが発生する電圧り
を印加するよ５にしている。なお電圧■の値は増幅器ｌ
の反転入力端子に印加されるバイアス電圧■に対して、
５　Ｇ　９１１ＡＰＬの信号が入力された時の同期先端
電圧と靜しいｉＬ圧に設定されている。本実施例も、第
３図に示した実施例と全く同様の動作を行ない、同様の
効果がある。According to this embodiment, when there is no signal, the bias voltage applied to the inverting input terminal of the amplifier 10 is controlled by the switch 9.
In addition, by changing it to ■ when a signal is input, it is possible to quickly return to normal and perform lamp operation when switching from no signal to signal input. Therefore, it is possible to extremely reduce screen disturbances that occur when there is no signal and when an image signal is input. FIG. 5 is a circuit diagram showing another embodiment of the clamp circuit of the present invention. In this case, a switch 11 is inserted into the inverting input terminal of the amplifier l, and when a signal is input, this switch applies the detection signal of the peak detection circuit to the non-inverting input terminal. 5 is applied to apply the voltage generated by lO.The value of voltage
For the bias voltage ■ applied to the inverting input terminal of
The synchronous tip voltage and quiet iL pressure are set when the 5G 911APL signal is input. This embodiment also operates in exactly the same way as the embodiment shown in FIG. 3, and has similar effects.

〔発明の効果〕〔Effect of the invention〕

以上記述した如く本発明のクランプ回路によれば、入力
段を構成する増幅器のバイアス電圧を無信号時と信号入
力時において変化させることにより、無信号時から信号
が入力された際に、速やかにクランプ動作を開始する効
果がある。As described above, according to the clamp circuit of the present invention, by changing the bias voltage of the amplifier constituting the input stage between when there is no signal and when a signal is input, This has the effect of starting the clamping operation.

【図面の簡単な説明】 第１図は従来のクランプ回路の一例を示した回路図、第
２図は第１図に示した回路における動作説明図、第３図
は本発明のクランプ回路の一実施例を示した回路図、第
４図は第３図で示した回路の動作説明図、第５図は本発
明のクランプ回路の他の実施例を示した回路図である。 ｌ・−増幅器、２．１０・・・定電圧源、５・・・比較
器、７、抵抗器、８・・・コンデンサ、９．１１−・ス
イッチ 代理人　弁理士　則　近　憲　佑 （はか１名） 第１図 ＵＴ 第２図 （Ａ）　（Ｂ） 第３図 第５図 ＵＩ[Brief Description of the Drawings] Figure 1 is a circuit diagram showing an example of a conventional clamp circuit, Figure 2 is an explanatory diagram of the operation of the circuit shown in Figure 1, and Figure 3 is an example of the clamp circuit of the present invention. FIG. 4 is an explanatory diagram of the operation of the circuit shown in FIG. 3, and FIG. 5 is a circuit diagram showing another embodiment of the clamp circuit of the present invention. l・-Amplifier, 2.10... Constant voltage source, 5... Comparator, 7, Resistor, 8... Capacitor, 9.11-・Switch agent Patent attorney Noriyuki Chika 1 person) Figure 1 UT Figure 2 (A) (B) Figure 3 Figure 5 UI

Claims (1)

【特許請求の範囲】[Claims] （１）　ｌ！ｉｔ：像信号が反転入力端子に入力される
増幅器と、比較器及びフィルタから成り、映像信号の同
期先端をピーク検波する次眸ので−り検波回路と！有し
、ピーク検波鼎路の検波出力を増幅器０非反転入力端子
に帰還す竺増幅器ソ゛ら同期先端がクランプされた映像
信号を出力する２２７１回路におゝ゛て・前、記増〒器
の反艷入力端、子に印加するバイアス電圧を無信号時と
信号入力時と１変化さく７′ｉ＜＜ｙｘ電圧変化手段を
設けたことを特徴とするクランプ回路。 、（２）前記無信号時のバイアス電圧を、映像信号入力
時のバイアス電圧に対し下、５０チの平均−流電圧を持
つ映像信号を前記増幅−の反転入力端子に入力した時の
この信号の同期先端電圧に等しくしたことを特徴とする
特許請求や範囲第１項記載のクランプ回路。(1) l! it: A next-order detection circuit that peak-detects the synchronization tip of the video signal, consisting of an amplifier into which the image signal is input to the inverting input terminal, a comparator, and a filter! In the 2271 circuit, which outputs a video signal whose synchronization tip is clamped, the detection output of the peak detection circuit is fed back to the non-inverting input terminal of amplifier 0. 1. A clamp circuit characterized in that a voltage changing means is provided for changing the bias voltage applied to the input terminal and terminal by one change between when there is no signal and when a signal is input. , (2) The bias voltage at the time of no signal is lower than the bias voltage at the time of inputting the video signal, and this signal is obtained when a video signal having an average current voltage of 50 cm is input to the inverting input terminal of the amplification. The clamp circuit according to claim 1, characterized in that the voltage is set equal to the synchronous tip voltage of .
JP58195315A 1983-10-20 1983-10-20 Lamp circuit Pending JPS6087574A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58195315A JPS6087574A (en) 1983-10-20 1983-10-20 Lamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58195315A JPS6087574A (en) 1983-10-20 1983-10-20 Lamp circuit

Publications (1)

Publication Number Publication Date
JPS6087574A true JPS6087574A (en) 1985-05-17

Family

ID=16339112

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58195315A Pending JPS6087574A (en) 1983-10-20 1983-10-20 Lamp circuit

Country Status (1)

Country Link
JP (1) JPS6087574A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02235429A (en) * 1989-03-08 1990-09-18 Japan Aviation Electron Ind Ltd Signal receiver
EP0512130A1 (en) * 1991-05-03 1992-11-11 Siemens Aktiengesellschaft Clamping circuit for video signals

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02235429A (en) * 1989-03-08 1990-09-18 Japan Aviation Electron Ind Ltd Signal receiver
EP0512130A1 (en) * 1991-05-03 1992-11-11 Siemens Aktiengesellschaft Clamping circuit for video signals

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