MD2844F1 - Phase shifter - Google Patents

Phase shifter Download PDF

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Publication number
MD2844F1
MD2844F1 MDA20040280A MD20040280A MD2844F1 MD 2844 F1 MD2844 F1 MD 2844F1 MD A20040280 A MDA20040280 A MD A20040280A MD 20040280 A MD20040280 A MD 20040280A MD 2844 F1 MD2844 F1 MD 2844F1
Authority
MD
Moldova
Prior art keywords
floor
input
digital
operational amplifier
signal
Prior art date
Application number
MDA20040280A
Other languages
Romanian (ro)
Other versions
MD2844G2 (en
Inventor
Vitalie Nastas
Artur CAZAC
Original Assignee
Universitatea Tehnica A Moldovei
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universitatea Tehnica A Moldovei filed Critical Universitatea Tehnica A Moldovei
Priority to MDA20040280A priority Critical patent/MD2844G2/en
Publication of MD2844F1 publication Critical patent/MD2844F1/en
Publication of MD2844G2 publication Critical patent/MD2844G2/en

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Abstract

Inventia se refera la radioelectronica si poate fi utilizata pentru introducerea defazajului programat in calea semnalului. Esenta inventiei consta in aceea ca defazorul contine primul etaj 1 dotat cu o intrare 2 de semnal, o iesire 3 de semnal, un contact 4 la masa, precum si doua rezistoare 6,7, un amplificator 5 operational si un condensator 8 conectat cu un contact la intrarea neinversoare a amplificatorului operational, unul din rezistoare 6 este conectat in circuitul reactiei negative a amplificatorului operational, intre intrarea inversoare a caruia si intrarea de semnal a etajului este conectat al doilea 7 rezistor, iar la iesirea amplificatorului operational este conectata iesirea de semnal. Primul etaj contine suplimentar un convertor 9 digital-analogic de tip cod-rezistenta, conectat cu iesirea intre intrarea neinversoare a amplificatorului operational si contactul la masa, iar al doilea contact al condensatorului este conectat la intrarea de semnal a etajului. Totodata defazorul contine suplimentar al doilea 10 si al treilea 11 etaje, avand aceeasi structura ca si primul, conectate in cascada la iesirea acestuia, precum si un bloc 13 de memorie permanenta cu n + m + c iesiri digitale, conectat cu n iesiri la intrarea convertorului digital-analogic al primului etaj, cu m iesiri - la intrarea convertorului digital-analogic al etajului al doilea si cu c iesiri - la intrarea convertorului digital-analogic al etajului al treilea. Elementele primului etaj asigura banda de reglare a defazajului (0 - f1)°, elementele etajului al doilea - (0 - f2)°, iar elementele etajului al treilea - (0 - f3)°, asa incat f1 + f2 + f3= 360°.Blocul de memorie permanenta contine un tabel programat de coduri numerice care asigura o dependenta sumara liniara a defazajului de codul de intrare al blocului de memorie si pasul necesar de reglare a defazajului. ŕThe invention relates to radio electronics and can be used to introduce the programmed phase shift in the signal path. The essence of the invention consists in that the defroster contains the first floor 1 equipped with an input 2 signal, an output 3 signal, a contact 4 at the ground, as well as two resistors 6.7, an operational amplifier 5 and a capacitor 8 connected with a contact at the non-inverting input of the operational amplifier, one of the resistors 6 is connected in the negative reaction circuit of the operational amplifier, between the inverter input and the signal input of the second resistor is connected, and at the output of the operational amplifier, the signal output is connected . The first floor additionally contains a digital-analog converter 9 of type code-resistance, connected with the output between the non-inverting input of the operational amplifier and the ground contact, and the second capacitor contact is connected to the signal input of the floor. At the same time, the defroster contains additionally the second 10 and the third 11 floors, having the same structure as the first, connected in the cascade at its output, as well as a permanent memory block 13 with n + m + c digital outputs, connected with n outputs at the input the digital-analog converter of the first floor, with outputs - at the entrance of the digital-analog converter of the second floor and with outputs - at the entrance of the digital-analog converter of the third floor. The elements of the first floor provide the phase adjustment band (0 - f1) °, the elements of the second floor - (0 - f2) °, and the elements of the third floor - (0 - f3) °, so that f1 + f2 + f3 = 360 °. The permanent memory block contains a programmed table of numerical codes that ensures a linear summary dependence of the phase shift on the input code of the memory block and the required step of adjusting the phase shift. à

MDA20040280A 2004-11-25 2004-11-25 Phase shifter MD2844G2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
MDA20040280A MD2844G2 (en) 2004-11-25 2004-11-25 Phase shifter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MDA20040280A MD2844G2 (en) 2004-11-25 2004-11-25 Phase shifter

Publications (2)

Publication Number Publication Date
MD2844F1 true MD2844F1 (en) 2005-08-31
MD2844G2 MD2844G2 (en) 2006-04-30

Family

ID=34859172

Family Applications (1)

Application Number Title Priority Date Filing Date
MDA20040280A MD2844G2 (en) 2004-11-25 2004-11-25 Phase shifter

Country Status (1)

Country Link
MD (1) MD2844G2 (en)

Also Published As

Publication number Publication date
MD2844G2 (en) 2006-04-30

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Legal Events

Date Code Title Description
KA4A Patent for invention lapsed due to non-payment of fees (with right of restoration)
MM4A Patent for invention definitely lapsed due to non-payment of fees