LU63213A1 - - Google Patents
Info
- Publication number
- LU63213A1 LU63213A1 LU63213DA LU63213A1 LU 63213 A1 LU63213 A1 LU 63213A1 LU 63213D A LU63213D A LU 63213DA LU 63213 A1 LU63213 A1 LU 63213A1
- Authority
- LU
- Luxembourg
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
- H03K19/0866—Stacked emitter coupled logic
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/04—Distributors combined with modulators or demodulators
- H04J3/047—Distributors with transistors or integrated circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dc Digital Transmission (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2025740A DE2025740C3 (de) | 1970-05-26 | 1970-05-26 | Sammelleitungsanordnung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU63213A1 true LU63213A1 (xx) | 1972-03-08 |
Family
ID=5772169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU63213D LU63213A1 (xx) | 1970-05-26 | 1971-05-24 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3780316A (xx) |
| BE (1) | BE767688A (xx) |
| DE (1) | DE2025740C3 (xx) |
| FR (1) | FR2093680A5 (xx) |
| GB (1) | GB1354027A (xx) |
| LU (1) | LU63213A1 (xx) |
| NL (1) | NL7106923A (xx) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1543658A (en) | 1976-09-30 | 1979-04-04 | Solartron Electronic Group | Buffer circuit for a data highway |
| US4167727A (en) * | 1977-07-08 | 1979-09-11 | Motorola, Inc. | Logic circuits incorporating a dual function input |
| JPS5676654A (en) * | 1979-11-29 | 1981-06-24 | Fujitsu Ltd | Bus transmission system |
| JPS5922414B2 (ja) * | 1980-10-08 | 1984-05-26 | 富士通株式会社 | ラインドライバ回路 |
| JPS58209226A (ja) * | 1982-05-31 | 1983-12-06 | Fujitsu Ltd | セツト回路 |
| JPS60134651A (ja) * | 1983-12-23 | 1985-07-17 | Fujitsu Ltd | 差動信号ドライバ |
| US4751406A (en) * | 1985-05-03 | 1988-06-14 | Advanced Micro Devices, Inc. | ECL circuit with output transistor auxiliary biasing circuit |
| US4703198A (en) * | 1986-07-07 | 1987-10-27 | Ford Motor Company | Bi-directional data transfer circuit that is directionally responsive to the impedance condition of an associated input/output port of a microcomputer |
| JPH01226213A (ja) * | 1988-03-04 | 1989-09-08 | Mitsubishi Electric Corp | ドライバ回路 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3207922A (en) * | 1961-10-02 | 1965-09-21 | Ibm | Three-level inverter and latch circuits |
| US3247323A (en) * | 1961-10-11 | 1966-04-19 | Automatic Elect Lab | Gating circuit for a time division multiplex switching system |
| US3450896A (en) * | 1964-11-21 | 1969-06-17 | Hitachi Ltd | Transistor switching circuit having compensating circuit |
-
1970
- 1970-05-26 DE DE2025740A patent/DE2025740C3/de not_active Expired
-
1971
- 1971-05-17 US US00144074A patent/US3780316A/en not_active Expired - Lifetime
- 1971-05-19 NL NL7106923A patent/NL7106923A/xx unknown
- 1971-05-24 LU LU63213D patent/LU63213A1/xx unknown
- 1971-05-25 GB GB1684071A patent/GB1354027A/en not_active Expired
- 1971-05-25 FR FR7118780A patent/FR2093680A5/fr not_active Expired
- 1971-05-26 BE BE767688A patent/BE767688A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE2025740B2 (de) | 1973-08-30 |
| FR2093680A5 (xx) | 1972-01-28 |
| GB1354027A (en) | 1974-06-05 |
| US3780316A (en) | 1973-12-18 |
| NL7106923A (xx) | 1971-11-30 |
| BE767688A (fr) | 1971-11-26 |
| DE2025740A1 (de) | 1971-12-09 |
| DE2025740C3 (de) | 1979-09-27 |