KR980006277A - Memory cell of nonvolatile semiconductor memory device and manufacturing method thereof - Google Patents

Memory cell of nonvolatile semiconductor memory device and manufacturing method thereof Download PDF

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Publication number
KR980006277A
KR980006277A KR1019960023623A KR19960023623A KR980006277A KR 980006277 A KR980006277 A KR 980006277A KR 1019960023623 A KR1019960023623 A KR 1019960023623A KR 19960023623 A KR19960023623 A KR 19960023623A KR 980006277 A KR980006277 A KR 980006277A
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South Korea
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region
nonvolatile semiconductor
field oxide
memory cell
semiconductor memory
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KR1019960023623A
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Korean (ko)
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KR100197565B1 (en
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한정욱
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김광호
삼성전자 주식회사
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Priority to KR1019960023623A priority Critical patent/KR100197565B1/en
Publication of KR980006277A publication Critical patent/KR980006277A/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region

Abstract

청구 범위에 기재된 발명이 속한 기술분야 : 불휘발성 반도체 메모리 장치에 관한 것이다.FIELD OF THE INVENTION The present invention relates to a nonvolatile semiconductor memory device.

발명이 해결하려고 하는 기술적 과제 : 독출수명의 단축과 데이터 보유 특성의 저하를 방지할 수 있는 불휘발성 반도체 메모리 장치의 메모리 셀 및 그 제조방법을 제공함에 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a memory cell of a nonvolatile semiconductor memory device and a method of manufacturing the same, which can shorten the read life and reduce the data retention characteristics.

발명의 해결방법의 요지 : 필드산화막사이에 형성되는 불휘발성 반도체 메모리 장치의 메모리 셀은 제1도전형의 기판상에 형성된 채널영역을 기입영역과 독출영역으로 분리하기 위한 채널분리 필드산화막을 가지는 것을 특징으로 한다.SUMMARY OF THE INVENTION A memory cell of a nonvolatile semiconductor memory device formed between field oxide films has a channel isolation field oxide film for separating a channel region formed on a substrate of a first conductivity type into a write region and a read region. It features.

발명의 중요한 용도 : 안정된 동작을 요구하는 불휘발성 반도체 메모리 장치에 적합하게 사용된다.Important use of the invention: It is suitably used for nonvolatile semiconductor memory devices requiring stable operation.

Description

불휘발성 반도체 메모리 장치의 메모리 셀 및 그 제조방법Memory cell of nonvolatile semiconductor memory device and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 3도는 본 발명의 실시예에 따라 구성된 불휘발성 반도체 메모리 장치의 메모리 셀을 나타낸 레이아웃3 is a layout showing memory cells of a nonvolatile semiconductor memory device constructed in accordance with an embodiment of the present invention.

Claims (6)

필드산화사이에 형성되는 불휘발성 반도체 메모리 장치의 메모리 셀에 있어서; 제1도전형의 기판상에 형성된 채널영역을 기입영역과 독출영역으로 분리하기 위한 채널분리 필드산화막을 가지는 것을 특징으로 하는 불휘발성 반도체 메모리 장치의 메모리 셀.A memory cell of a nonvolatile semiconductor memory device formed between field oxides; And a channel isolation field oxide film for separating a channel region formed on the substrate of the first conductive type into a write region and a read region. 제1항에 있어서, 상기 기입영역은 상기 필드산화막과 상기 채널분리 필드산화막 사이에 고농도로 도핑된 제1도전형의 제1드레인영역과 상기 제1드레인영역내에 고농도로 도핑된 제2전도형의 제2드레인영역을 가지는 드레인영역과 소오스영역 사이에 형성되는 영역임을 특징으로 하는 불휘발성 반도체 메모리 장치의 메모리 셀The method of claim 1, wherein the writing area is a first conductive region of a first conductivity type doped with high concentration between the field oxide layer and the channel isolation field oxide layer and a second conductive type doped with high concentration in the first drain region. A memory cell of a nonvolatile semiconductor memory device, comprising: a region formed between a drain region having a second drain region and a source region 제1항에 있어서, 상기 독출영역은 상기 필드 산화막과 상기 채널분리 필드산하막 사이에 고농도로 도핑된 제2도전형의 드레인영역과 소오스영역사이에 형성되는 영역임을 특징으로 하는 불휘발성 반도체 메모리 장치의 메모리 셀The nonvolatile semiconductor memory device of claim 1, wherein the read region is a region formed between a drain region and a source region of a second conductivity type that are heavily doped between the field oxide layer and the channel isolation field underlayer. Memory cell 제2항 또는 제3항에 있어서, 상기 제1도전형은 피형 불순물이고, 상기 제2도전형은 엔형 불순물임을 특징으로 하는 불휘발성 반도체 메모리 장치의 메모리 셀4. The memory cell of claim 2 or 3, wherein the first conductivity type is a dopant impurity and the second conductivity type is an en-type impurity. 불휘발성 반도체 메모리 장치의 메모리 셀을 제조하기 위한 방법에 있어서; 제1도전형의 반도체 기판상에 국부산화공정으로 제1,2,3필드산화막을 형성후 이 산화막들간에 게이트 절연막을 형성하는 과정과, 상기 제1,3필드산화막들간에 플로팅 게이트층을 형성한 후 이 플로팅 게이트 층상에 층간 절연막을 형성하는 과정과, 상기 층간졀연막사이에 제어게이트층을 형성하는 과정과, 상기 제1,2플드산화막사이에 고농도로 도핑된 제1도전형의 제1드레인영역을 형성하는 과정과, 상기 제1드레인영역상에 고농도로 도핑된 제2도전형의 제2드레인영역 및 상기 제2,3필드산화막들 사이에 고농도로 도핑된 소소스영역을 형성하는 과정으로 이루어짐을 특징으로 하는 방법A method for manufacturing a memory cell of a nonvolatile semiconductor memory device, comprising: Forming a first, second, and three field oxide films on the first conductive semiconductor substrate by a local oxidation process, forming a gate insulating film between the oxide films, and forming a floating gate layer between the first and third field oxide films. Thereafter, an interlayer insulating film is formed on the floating gate layer, a control gate layer is formed between the interlayer dielectric film, and the first conductive type is first doped with a high concentration between the first and second pleated oxide films. Forming a drain region, and forming a highly doped small source region between the second drain region of the second conductivity type and the second and third field oxide films heavily doped on the first drain region; Method characterized by consisting of 제5항에 있어서, 상기 제1도전층은 피형의 불순물이고, 상기 제2도전층은 엔형불순물임을 특징으로 하는 방법6. The method of claim 5, wherein the first conductive layer is an impurity of a shape, and the second conductive layer is an Y-type impurity.
KR1019960023623A 1996-06-25 1996-06-25 Memory cell of non-volatile semiconductor memory device and manufacturing method of the same KR100197565B1 (en)

Priority Applications (1)

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KR1019960023623A KR100197565B1 (en) 1996-06-25 1996-06-25 Memory cell of non-volatile semiconductor memory device and manufacturing method of the same

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KR1019960023623A KR100197565B1 (en) 1996-06-25 1996-06-25 Memory cell of non-volatile semiconductor memory device and manufacturing method of the same

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KR980006277A true KR980006277A (en) 1998-03-30
KR100197565B1 KR100197565B1 (en) 1999-06-15

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