KR970077494A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device Download PDF

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Publication number
KR970077494A
KR970077494A KR1019960017614A KR19960017614A KR970077494A KR 970077494 A KR970077494 A KR 970077494A KR 1019960017614 A KR1019960017614 A KR 1019960017614A KR 19960017614 A KR19960017614 A KR 19960017614A KR 970077494 A KR970077494 A KR 970077494A
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KR
South Korea
Prior art keywords
polysilicon layer
oxide film
layer
forming
dry etching
Prior art date
Application number
KR1019960017614A
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Korean (ko)
Inventor
백인혁
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960017614A priority Critical patent/KR970077494A/en
Publication of KR970077494A publication Critical patent/KR970077494A/en

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Abstract

본 발명은 반도체 소자의 제조방법에 관한 것으로, 질화막을 제거한 후, 핫순수를 이용한 린스처리로 폴리실리콘층의 상부에 얇은 산화막을 형성하므로써 폴리실리콘층 제거시 액티브 에지영역에 보이드에 의한 시릴콘기판의 식각손상을 방지하여 소자의 특성을 향상시킬 수 있는 효과가 있다.The present invention relates to a method of manufacturing a semiconductor device, which comprises forming a thin oxide film on a polysilicon layer by rinsing with hot pure water after removing a nitride film, thereby forming a silicon oxide film on the active edge area, It is possible to prevent the etching damage of the device and improve the characteristics of the device.

Description

반도체 소자의 제조 방법Method of manufacturing semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제1A 내지 1F도는 본 발명에 따른 반도체 소자의 필드산화막 형성 방법을 설명하기 위한 소자의 단면도.1A to 1F are sectional views of a device for explaining a field oxide film forming method of a semiconductor device according to the present invention.

Claims (4)

반도체 소자의 제조방법에 있어서, 실리콘기판상에 패드산화막, 폴리실리콘층 및 질화막을 순차적으로 형성한 후 필드영역의 상기 질화막 및 폴리실리콘층을 패터닝 하는 단계와, 상기 단계로부터 노출된 상기 실리콘기판을 산화시켜 필드산화막을 형성한 후 인산용액을 이용하여 상기 질화막을 제거하는 단계와, 상기 단계로부터 상기 폴리실리콘층상에 남아 있는 상기 인상용액을 핫순수를 이용하여 제거하는 동시에 상기 필드산화막 형성시 상기 폴리실리콘층의 액티브 에지 영역에 형성된 보이드 및 상기 폴리 실리콘층상에 산화막을 형성하는 단계와, 상기 단계로부터 상기 폴리실리콘층을 건식식각 방법으로 제거하여 상기 보이드에 형성된 산화막이 봉형상의 산화막으로 형성되는 단계와, 상기 단계로부터 상기 봉형상의 산화막을 제거하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 제조방법.A method of manufacturing a semiconductor device, comprising: sequentially forming a pad oxide film, a polysilicon layer, and a nitride film on a silicon substrate; patterning the nitride film and the polysilicon layer in a field region; Forming a field oxide film on the polysilicon layer, removing the nitride film using a phosphoric acid solution, removing the impurity solution remaining on the polysilicon layer from the polysilicon layer using hot pure water, Forming an oxide film on the polysilicon layer and voids formed in an active edge region of the silicon layer; removing the polysilicon layer from the polysilicon layer by a dry etching method to form an oxide film formed on the voids into a bar-shaped oxide film; , A step of removing the rod-shaped oxide film from the step Wherein the first semiconductor layer and the second semiconductor layer are formed on a semiconductor substrate. 제1항에 있어서, 상기 핫순수의 온도는 85 내지95℃인 것을 특징으로 하는 반도체 소자의 제조방법.The method according to claim 1, wherein the temperature of the hot pure water is 85 to 95 占 폚. 제1항에 있어서, 상기 산화막은 40 내지 50A의 두께로 형성되는 것을 특징으로 하는 반도체 소자의 제조 방법.The method of claim 1, wherein the oxide film is formed to a thickness of 40 to 50A. 제1항에 있어서, 상기 건식식각 방법은 플라즈마 식각으로 150 내지 200와트의 전력 및 1 내지 1.5Torr의 압력조건에서 5 : 1로 혼합된 SF6가스 및 Cl2가스를 사용하여 8 내지 12초간 실시된 후 90내지 120와트의 전력 및 1 내지 1.5Torr의 압력조건에서 5 : 1 로 혼합된SF6가스 및 Cl2가스를 사용하여 40 내지 60초간 실시되는 것을 특징으로 하는 반도체 소자의 제조방법.The dry etching method according to claim 1, wherein the dry etching method is performed for 8 to 12 seconds using SF 6 gas and Cl 2 gas mixed at 5: 1 under a pressure of 150 to 200 watts and a pressure of 1 to 1.5 Torr by plasma etching And then performing SF 6 gas and Cl 2 gas mixed at a ratio of 5: 1 at a power of 90 to 120 watts and a pressure of 1 to 1.5 Torr for 40 to 60 seconds. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960017614A 1996-05-23 1996-05-23 Method of manufacturing semiconductor device KR970077494A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960017614A KR970077494A (en) 1996-05-23 1996-05-23 Method of manufacturing semiconductor device

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Application Number Priority Date Filing Date Title
KR1019960017614A KR970077494A (en) 1996-05-23 1996-05-23 Method of manufacturing semiconductor device

Publications (1)

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KR970077494A true KR970077494A (en) 1997-12-12

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KR1019960017614A KR970077494A (en) 1996-05-23 1996-05-23 Method of manufacturing semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100752219B1 (en) * 2001-12-28 2007-08-28 매그나칩 반도체 유한회사 Method for manufacturing isolation of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100752219B1 (en) * 2001-12-28 2007-08-28 매그나칩 반도체 유한회사 Method for manufacturing isolation of semiconductor device

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