KR970077378A - Multichip structure with chip on lead (COL) technology - Google Patents

Multichip structure with chip on lead (COL) technology Download PDF

Info

Publication number
KR970077378A
KR970077378A KR1019960017759A KR19960017759A KR970077378A KR 970077378 A KR970077378 A KR 970077378A KR 1019960017759 A KR1019960017759 A KR 1019960017759A KR 19960017759 A KR19960017759 A KR 19960017759A KR 970077378 A KR970077378 A KR 970077378A
Authority
KR
South Korea
Prior art keywords
chip structure
col
chip
bonding pads
bonded
Prior art date
Application number
KR1019960017759A
Other languages
Korean (ko)
Inventor
정문채
서정우
김영대
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960017759A priority Critical patent/KR970077378A/en
Publication of KR970077378A publication Critical patent/KR970077378A/en

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 멀티 칩 구조에 관한 것으로, 적어도 둘 이상의 접착 테이프들이 각기 이격·형성된 리드들의 상부면에 각기 이격·접착된 리드프레임; 그 각 접착 테이프의 상부면에 각기 접착되어 있으며, 상부면에 복수개의 본딩 패드들을 갖는 적어도 둘 이상의 칩; 및 상기 본딩 패드들과 각기 대응된 리드들을 각기 전기적 연결하는 수단;을 포함하는 것을 특징으로 하는 COL기술을 적용한 멀티 칩 구조를 제공함으로써, 통상적인 멀티 칩 구조에 사용되는 패턴닝된 기판을 적용치 않기 때문에 제조 단가가 낮고, COL구조를 이룸으로써 패키지의 두께가 박형화되는 장점과 후속 공정에 사용되는 반도체 제조 장치의 규격에 맞추어 제작될 수 있기 때문에 신규 장비 구입이 요구치 않는 장점을 갖는 특징이 있다.The present invention relates to a multi-chip structure, and more particularly, to a multi-chip structure in which at least two adhesive tapes are respectively separated and bonded to the upper surface of each of spaced and formed leads; At least two chips each bonded to an upper surface of each adhesive tape and having a plurality of bonding pads on an upper surface thereof; And means for electrically connecting leads corresponding to the bonding pads to each other. By providing the multi-chip structure using the COL technology, it is possible to provide a multi-chip structure in which a patterned substrate used in a conventional multi- Therefore, it is advantageous in that the thickness of the package is reduced by forming the COL structure at a low manufacturing cost, and it can be manufactured in accordance with the standard of a semiconductor manufacturing apparatus used in a subsequent process.

Description

COL(chip on lead)기술을 적용한 멀티 칩 구조Multichip structure with chip on lead (COL) technology

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제3도는 본 발명에 의한 COL기술을 적용한 멀티 칩 구조를 나타내는 결합 사시도.FIG. 3 is a combined perspective view showing a multi-chip structure using the COL technique according to the present invention; FIG.

Claims (3)

적어도 둘 이상의 접착 테이프들이 각기 이격·형성된 리드들의 상부면에 각기 이격·접착된 리드프레임; 그 각 접착 테이프의 상부면에 각기 접착되어 있으며, 상부면에 복수 개의 본딩 패드들을 갖는 적어도 둘 이상의 칩; 및 상기 본딩 패드들과 각기 대응된 리드들을 각기 전기적 연결하는 수단;을 포함하는 것을 특징으로 하는 COL기술을 적용한 멀티 칩 구조.A lead frame in which at least two adhesive tapes are separately bonded to the upper surface of each of the spaced-apart leads; At least two chips each bonded to an upper surface of each adhesive tape and having a plurality of bonding pads on an upper surface thereof; And means for electrically connecting leads corresponding to the bonding pads to each other. 제1항에 있어서, 상기 접착 테이프가 접착된 부분의 리드들이 아래로 절곡된 구조를 갖는 것을 특징으로 하는 COL기술을 적용한 멀티 칩 구조.The multi-chip structure according to claim 1, wherein the leads of the portion to which the adhesive tape is adhered are bent downward. 제1항에 있어서, 상기 접착 테이프가 양면 접착성의 폴리이미드 테이프인 것을 특징으로 하는 COL기술을 적용한 멀티 칩 구조.The multi-chip structure according to claim 1, wherein the adhesive tape is a double-sided adhesive polyimide tape. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960017759A 1996-05-23 1996-05-23 Multichip structure with chip on lead (COL) technology KR970077378A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960017759A KR970077378A (en) 1996-05-23 1996-05-23 Multichip structure with chip on lead (COL) technology

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960017759A KR970077378A (en) 1996-05-23 1996-05-23 Multichip structure with chip on lead (COL) technology

Publications (1)

Publication Number Publication Date
KR970077378A true KR970077378A (en) 1997-12-12

Family

ID=66220288

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960017759A KR970077378A (en) 1996-05-23 1996-05-23 Multichip structure with chip on lead (COL) technology

Country Status (1)

Country Link
KR (1) KR970077378A (en)

Similar Documents

Publication Publication Date Title
KR970067781A (en) Semiconductor device, manufacturing method thereof, and collective semiconductor device
FR2720190B1 (en) Method for connecting the output pads of an integrated circuit chip, and multi-chip module thus obtained.
KR930024140A (en) Semiconductor device and manufacturing method
KR940008061A (en) Chip Assembly on Substrate and Manufacturing Method Thereof
KR970077378A (en) Multichip structure with chip on lead (COL) technology
KR0129132Y1 (en) I.c package
KR970024122A (en) Stacked Chip Packages with Same Bonding Direction
KR200155176Y1 (en) A semiconductor package
KR940002773Y1 (en) Lead-flame structure for die attaching
KR930007920Y1 (en) Double package structure having both side thin film
KR970013233A (en) Multi-chip package with center pad type chip using substrate
KR930007919Y1 (en) Both side-tab package
KR970053689A (en) Structure and Manufacturing Method of Chip Size Package
KR970023917A (en) Semiconductor package to prevent short circuit of wire
KR970023896A (en) Semiconductor Chip Package Without Die Bonding Layer
KR940008052A (en) Semiconductor package
KR970053186A (en) Interconnection method using stud bump
KR920020690A (en) Semiconductor lead frame
KR970024038A (en) Frame with groove and semiconductor package using same
KR970013283A (en) Laminated chip packing structure using tab tape
KR970024113A (en) Lead-on chip package manufacturing method
KR970063687A (en) Power package with direct electrical connection structure between dummy leads and heat sink
KR980012335A (en) Semiconductor package
KR970018456A (en) Stacked Chip Package with Center Pad
KR970053713A (en) Manufacturing method of multichip package

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination