KR970072361A - BGA semiconductor package - Google Patents

BGA semiconductor package Download PDF

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Publication number
KR970072361A
KR970072361A KR1019960009777A KR19960009777A KR970072361A KR 970072361 A KR970072361 A KR 970072361A KR 1019960009777 A KR1019960009777 A KR 1019960009777A KR 19960009777 A KR19960009777 A KR 19960009777A KR 970072361 A KR970072361 A KR 970072361A
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KR
South Korea
Prior art keywords
heat sink
semiconductor chip
pcb substrate
heat
bga
Prior art date
Application number
KR1019960009777A
Other languages
Korean (ko)
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KR100233861B1 (en
Inventor
이무응
Original Assignee
황인길
아남산업 주식회사
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Priority to KR1019960009777A priority Critical patent/KR100233861B1/en
Publication of KR970072361A publication Critical patent/KR970072361A/en
Application granted granted Critical
Publication of KR100233861B1 publication Critical patent/KR100233861B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

본 발명은 BGA 반도체 패키지의 방열판 구조에 관한 것으로, 종래의 방열판의 구조를 갖는 BGA 반도체 패키지는 그 제조 공정 중의 고열이나 또는 BGA 반도체 패키지가 완성되어 마더 보드에 실장된 후 반도체 칩이 작동할 때에 생기는 고열로 인해 방열판과 반도체 칩 또는 PCB 기판 사이에 응력이 발생하여 상부나 하부로 휘는 휨 현상 또는 계면 박리 현상이 발생하는데, 반도체 칩의 저면에 접착제로서 접착된 방열판과, 상기 반도체 칩보다크게 관통부가 형성되어 상기 반도체 칩이 관통부 내측에 위치되도록 방열판 상에 접착된 PCB 기판에 있어서 상기 PCB 기판의 관통부 내측의 방열판의 요홈부를 형성하거나, 방열판에 바둑판 형상의 요홈부를 형성시키는 등의 공정을 함으로서 상기 요홈부가 방열판의 응력 또는 변형력을 흡수함으로서 BGA 반도체 패키지의 휨 현상과 계면박리 현상을 억제하고 또한 반도체 칩과 PCB기판을 상기 방열판에 접착제로 접착시킬 때 상기 반도체 칩과 PCB 기판의 접착 부분 외측으로 접착제가 흘러나오지 못하도록 접착제 흐름 방지홈의 역할도 겸함으로서 BGA 반도체 패키지의 신뢰성을 향상시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a heat sink structure of a BGA semiconductor package, and a BGA semiconductor package having a heat dissipating structure of the related art has high heat during its manufacturing process, A heat dissipation plate adhered as an adhesive to the bottom surface of the semiconductor chip and a heat dissipation plate bonded to the heat dissipation plate more than the semiconductor chip, A recessed portion of the heat sink inside the penetration portion of the PCB substrate is formed on the PCB substrate bonded to the heat sink so that the semiconductor chip is positioned inside the penetration portion or a checkered recess is formed in the heat sink, The recesses absorb the stress or strain of the heat sink, And prevents the adhesive from flowing out of the bonding portion between the semiconductor chip and the PCB substrate when the semiconductor chip and the PCB substrate are adhered to the heat sink by an adhesive, The reliability of the BGA semiconductor package can be improved.

Description

제1도는 본 발명에 의한 BGA 반도체 패키지의 단면도.FIG. 1 is a sectional view of a BGA semiconductor package according to the present invention. FIG.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제1도는 본 발명에 의한 BGA 반도체 패키지의 단면도.FIG. 1 is a sectional view of a BGA semiconductor package according to the present invention. FIG.

Claims (6)

일면에 적어도 1개 이상의 요홈부가 형성된 방열판과, 상기 방열판의 중앙 상면에 접착제로 접착된 반도체 칩과, 상기 반도체 칩의 크기보다 더크게 관통부가 형성되어 반도체 칩이 관통부 내측에 위치되도록 방열판 상면에 접착제로 접착된 PCB기판과, 상기PCB 기판과 반도체 칩이 입/출력 패드를 연결하는 와이어와, 상기 PCB기판상에 융착된 솔더 볼과, 상기 반도체 칩등이 액상 봉지제로 몰딩 된 것을 특징으로 하는 BGA반도체 패키지.A semiconductor chip bonded to the central upper surface of the heat dissipating plate by an adhesive; and a through hole formed in the upper surface of the heat dissipation plate such that the semiconductor chip is positioned inside the through hole, Wherein the semiconductor chip is molded with a liquid encapsulant, and the solder ball is fused onto the PCB substrate. The semiconductor chip is molded from a liquid encapsulant. Semiconductor package. 제1항에 있어서, 상기 요홈부는 방열판의 일면과 PCB기판에 구비된 관통부의 내측이 만나는 지점을 따라서 형성됨을 특징으로 하는 BGA 반도체 패키지.The BGA package according to claim 1, wherein the recess is formed along a point where one side of the heat sink meets the inside of the through hole provided in the PCB substrate. 제1항에 있어서, 상기 요홈부는 방열판의 일면에 바둑판 형상으로 형성됨을 특징으로 하는 BGA 반도체 패키지.The BGA package according to claim 1, wherein the recess is formed in a checkerboard shape on one surface of the heat sink. 제1항에 있어서, 상기 방열판의 일면에 PCB 기판의 관통부가 위치할 부분을 따라서 상, 하는 수평 형상의 요홈부가 형성되고, 좌, 우는 수직 형상의 요홈부가 형성됨을 특징으로 하는BGA 반도체 패키지.The BGA package according to claim 1, wherein a horizontal groove is formed on a surface of the heat dissipation plate along a portion of the PCB substrate where the through hole is to be formed, and left and right vertical grooves are formed. 제1항 내지 4항에 있어서 상기 요홈부는 방열판의 양면 모두에 형성됨을 특징으로 하는 BGA 반도체 패키지.The BGA semiconductor package according to any one of claims 1 to 4, wherein the recess is formed on both sides of the heat sink. 제1항 또는 제4항에 있어서, 상기 요홈부는 방열판을 상하 관통하여 형성됨을 특징으로 하는 BGA 반도체 패키지.The BGA package according to claim 1 or 4, wherein the recess is formed by vertically penetrating a heat sink. ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960009777A 1996-04-01 1996-04-01 Bga semiconductor package KR100233861B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960009777A KR100233861B1 (en) 1996-04-01 1996-04-01 Bga semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960009777A KR100233861B1 (en) 1996-04-01 1996-04-01 Bga semiconductor package

Publications (2)

Publication Number Publication Date
KR970072361A true KR970072361A (en) 1997-11-07
KR100233861B1 KR100233861B1 (en) 1999-12-01

Family

ID=19454818

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960009777A KR100233861B1 (en) 1996-04-01 1996-04-01 Bga semiconductor package

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100411812B1 (en) * 2001-04-02 2003-12-24 앰코 테크놀로지 코리아 주식회사 Manufacturing method of semiconductor package
KR100697624B1 (en) * 2005-07-18 2007-03-22 삼성전자주식회사 Package substrate having surface structure adapted for adhesive flow control and semiconductor package using the same
KR101133129B1 (en) 2006-02-25 2012-04-06 삼성테크윈 주식회사 Semiconductor package
KR101026116B1 (en) 2008-02-22 2011-04-05 주식회사 바른전자 Bonding structure and method for bonding substrates using the same

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Publication number Publication date
KR100233861B1 (en) 1999-12-01

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