KR970058010A - Memory device of PDP TV - Google Patents

Memory device of PDP TV Download PDF

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Publication number
KR970058010A
KR970058010A KR1019950060944A KR19950060944A KR970058010A KR 970058010 A KR970058010 A KR 970058010A KR 1019950060944 A KR1019950060944 A KR 1019950060944A KR 19950060944 A KR19950060944 A KR 19950060944A KR 970058010 A KR970058010 A KR 970058010A
Authority
KR
South Korea
Prior art keywords
control signal
memory
image data
data
selection
Prior art date
Application number
KR1019950060944A
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Korean (ko)
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KR100196832B1 (en
Inventor
박원정
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019950060944A priority Critical patent/KR100196832B1/en
Publication of KR970058010A publication Critical patent/KR970058010A/en
Application granted granted Critical
Publication of KR100196832B1 publication Critical patent/KR100196832B1/en

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/907Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

본 발명은 피디피 티브이(PDP TV)의 메모리 장치에 관한 것으로, 방송국으로부터 전송되는 복합영상신호가 A/D변환부를 통해 디지털의 영상데이터로 변환되고, 데이터 처리부를 통해 동일한 가중치를 갖는 영상데이터로 재배열된 다음, 기수필드의 영상데이터는 기수필드 메모리에 저장되고, 우수필드의 영상데이터는 우수필드 메모리에 저장된 다음, 메모리 제어부로부터의 선택을 위한 제어신호에 의거하여 기수필드 메모리와 우수필드 메모리에 저장되어 있는 각 필드의 영상데이터가 번갈아가며 PDP 구동회로로 제공되므로써, 비월주사 방식으로 영상데이터를 처리하므로, 순차주사 방식으로 변환하기 위해 구비되는 메모리의 용량을 절감시킬 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory device of a PDP TV, wherein a composite video signal transmitted from a broadcasting station is converted into digital video data through an A / D converter, and reconverted into video data having the same weight through a data processor. After arranging, the image data of the odd field is stored in the odd field memory, the image data of the even field is stored in the even field memory, and then stored in the odd field memory and the even field memory based on a control signal for selection from the memory control unit. Since the image data of each stored field is alternately provided to the PDP driving circuit, the image data is processed in the interlaced scanning method, thereby reducing the capacity of the memory provided for converting the progressive scanning method.

Description

피디피 티브이의 메모리 장치PDTV memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 바람직한 실시예에 따른 PDP TV의 메모리 장치에 대한 개략적인 블록구성도.1 is a schematic block diagram of a memory device of a PDP TV according to a preferred embodiment of the present invention.

제2도는 종래의 통상적인 PDP TV의 메모리 장치에 대한 개략적인 블록구성도.2 is a schematic block diagram of a memory device of a conventional PDP TV.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

110 : 제어신호 발생부 120 : A/D변환부110: control signal generator 120: A / D conversion unit

130 : 데이터 처리부 140 : 메모리 제어부130: data processing unit 140: memory control unit

150,160 : 프레임 메모리 155 : 기수필드 메모리150,160: frame memory 155: radix field memory

165 : 우수필드 메모리 170 : 데이터 선택부165: storm field memory 170: data selection unit

Claims (1)

방송국으로부터 전송되는 복합 영상신호를 저장한 다음 PDP 구동회로로 제공하는 메모리 장치에 있어서, 상기 복합영상신호 중에 포함되어 있는 수평동기신호와 수직동기신호를 기준으로 아날로그의 복합 영상신호를 디지탈의 영상 데이터로 변환하기 위한 제어신호, 데이터 처리를 위한 제어신호, 저장을 위한 제어신호, 메모리 할당 및 선택을 위한 제어신호, 그리고 데이터 선택을 위한 제어신호를 각각 발생하는 제어신호 발생수단(110); 상기 제어신호 발생수단(110)으로부터의 변환을 위한 제어신호에 의거하여 상기 아날로그의 복합 영상신호를 디지털 의 영상 데이터로 변환하기 위한 A/D변환수단(120); 상기 제어신호 발생수단(110)으로부터의 데이터 처리를 위한 제어신호에 의거하여 상기 A/D변환수단(120)에서 디지털로 변환된 영상 데이터를 동일한 가중치를 갖는 영상 데이터로 재배열하기 위한 데이터 처리수단(130); 상기 제어신호 발생수단(110)으로부터의 메모리 할당 및 선택을 위한 제어신호에 의거하여 두 개의 필드 메모리(155,165)중에 어느 하나를 선택하는 동시에 어드레스를 할당하기 위한 메모리 제어수단(140); 상기 제어신호 발생수단(110)으로부터의 저장을 위한 제어신호에 의거하여 상기 메모리 제어수단(140)에서 할당된 어드레스에 상기 데이터 처리수단(130)을 통해 재배열된 영상데이터를 저장하기 위한 상기 두 개의 필드 메모리(155,165); 상기 메모리 제어수단(140)으로부터의 선택을 위한 제어신호에 의거하여 상기 두 개의 필드 메모리(155,165)로부터 독출되어 제공되는 영상 데이터 중에 상기 제어신호 발생수단(140)으로부터의 선태택을 위한 제어신호에 의거하여 상기 PDP 구동회로로 선택적으로 제공하기 위한 데이터 선택수단(170)으로 구성된 것을 특징으로 하는 피디피 티브이(PDP TV)의 메모리 장치.A memory device for storing a composite video signal transmitted from a broadcasting station and then providing the composite video signal to a PDP driving circuit, wherein the analog video signal is converted into digital video data based on a horizontal sync signal and a vertical sync signal included in the composite video signal. Control signal generating means (110) for generating a control signal for converting to a control signal, a control signal for data processing, a control signal for storage, a control signal for memory allocation and selection, and a control signal for data selection, respectively; A / D conversion means (120) for converting the analog composite video signal into digital video data based on the control signal for conversion from the control signal generating means (110); Data processing means for rearranging the image data digitally converted by the A / D conversion means 120 into image data having the same weight based on the control signal for data processing from the control signal generating means 110 130; Memory control means (140) for selecting any one of two field memories (155, 165) and allocating an address at the same time based on a control signal for memory allocation and selection from the control signal generating means (110); The two for storing the rearranged image data through the data processing means 130 at the address assigned by the memory control means 140 based on the control signal for storage from the control signal generating means 110 Field memories 155 and 165; On the basis of a control signal for selection from the control signal generating means 140 among the image data read out from the two field memories 155 and 165 based on a control signal for selection from the memory control means 140. And a data selecting means (170) for selectively providing the PDP driving circuit to the PDP driving circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950060944A 1995-12-28 1995-12-28 Memory in pdp tv KR100196832B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950060944A KR100196832B1 (en) 1995-12-28 1995-12-28 Memory in pdp tv

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Application Number Priority Date Filing Date Title
KR1019950060944A KR100196832B1 (en) 1995-12-28 1995-12-28 Memory in pdp tv

Publications (2)

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KR970058010A true KR970058010A (en) 1997-07-31
KR100196832B1 KR100196832B1 (en) 1999-06-15

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100427744B1 (en) * 1997-04-30 2004-09-16 주식회사 대우일렉트로닉스 Method for data interface of plasma display panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100427744B1 (en) * 1997-04-30 2004-09-16 주식회사 대우일렉트로닉스 Method for data interface of plasma display panel

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Publication number Publication date
KR100196832B1 (en) 1999-06-15

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