KR970053972A - Antistatic field transistor and its manufacturing method - Google Patents

Antistatic field transistor and its manufacturing method Download PDF

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Publication number
KR970053972A
KR970053972A KR1019950069472A KR19950069472A KR970053972A KR 970053972 A KR970053972 A KR 970053972A KR 1019950069472 A KR1019950069472 A KR 1019950069472A KR 19950069472 A KR19950069472 A KR 19950069472A KR 970053972 A KR970053972 A KR 970053972A
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KR
South Korea
Prior art keywords
forming
field oxide
oxide film
field
gate electrode
Prior art date
Application number
KR1019950069472A
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Korean (ko)
Inventor
김재갑
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950069472A priority Critical patent/KR970053972A/en
Priority to JP8356106A priority patent/JPH1012827A/en
Publication of KR970053972A publication Critical patent/KR970053972A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 정전기 방지용 필드 트랜지스터 및 그의 제조방법에 관한 것으로, 특히 반도체 소자에 있어서의 고전압의 정전기로 인한 필드 트랜지스터의 게이트 절연막의 파괴되는 현상을 방지하여 소자의 특성을 향상시킬 수 있는 정전기 방지용 필드 트랜지스터 및 그의 제조방법에 관한 것으로, 본 발명에 따르면, 필드 산화막하부 영역에 드레인, 소오스와 동일타입의 불순물로 이루어진 웰을 형성하여 반도체 소자에 정전기가 발생하는 경우, 필드 트랜지스터의 게이트 전극이 열리기 이전에 액티브 영역의 게이트 산화막이 파괴되는 현상을 방지할 수 있으므로, 소자의 특성을 개선하는 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an antistatic field transistor and a method of manufacturing the same. In particular, an antistatic field transistor capable of preventing the breakdown of the gate insulating film of the field transistor due to high voltage static electricity in a semiconductor device can improve the characteristics of the device. And a method for manufacturing the same, according to the present invention, in the case where static electricity is generated in a semiconductor device by forming a well made of impurities of the same type as a drain and a source in the field oxide film lower region, before the gate electrode of the field transistor is opened. Since the phenomenon in which the gate oxide film in the active region is destroyed can be prevented, there is an effect of improving the characteristics of the device.

Description

정전기 방지용 필드 트랜지스터 및 그의 제조방법Antistatic field transistor and its manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도 (가) 및 (나)는 본 발명의 일 실시예에 다른 정전기 방지용 필드 트랜지스터의 제조 방법을 설명하기 위한 단면도.3A and 3B are cross-sectional views illustrating a method of manufacturing an antistatic field transistor according to an embodiment of the present invention.

Claims (4)

반도체 기판의 적소에 필드 산화막이 형성되어 있고, 상기 필드 산화막 상부에는 일정 크기의 게이트 전극이 형성되어 있고, 상기 필드 산화막의 양측부의 기판 영역에 소오스, 드레인 형성되어 있고, 상기 각각의 소오스, 드레인 하부에는 웰이 형성되어 있는 것을 특징으로 하는 정전기 방지용 필드 트랜지스터.A field oxide film is formed in place on the semiconductor substrate, a gate electrode having a predetermined size is formed on the field oxide film, and a source and a drain are formed in the substrate regions on both sides of the field oxide film, and the respective source and drain portions are respectively formed. An antistatic field transistor, characterized in that the well is formed. 제1항에 있어서, 상기 게이트 전극폭의 양 끝 하단에는 상기 필드 산화막의 양측에 형성된 웰 영역의 일부분이 포함되어 잇는 것을 특징으로 하는 정전기 방지용 필드 트랜지스터.The antistatic field transistor of claim 1, wherein a portion of the well region formed at both ends of the gate electrode width is included at both ends of the gate electrode width. 반도체 기판의 소정 영역에 필드 산화막을 형성하는 단계; 상기 필드 산화막 하부에 확장되도록 웰을 형성하는 단계 상기 필드 산화막 상부의 소정 부분에만 존재하도록 실각하여 게이트 전극을 형성하는 단계; 상기 웰 영역 상부에 드레인, 소오스 영역을 형성하는 단계; 상기 결과물 상부에 층간 절연막을 형성하는 단계; 상기 층간 절연막을 소정 부분 식각하여 콘택홀을 형성하는 단계; 및 상기 콘택홀 내부 및 구조물 상부에 금속막을 형성하고 소정 부분 식각하여 금속 배선을 형성하는 단계를 포함하는 것을 특징으로 하는 정전기 방지용 필드 트랜지스터의 제조방법.Forming a field oxide film on a predetermined region of the semiconductor substrate; Forming a well so as to extend below the field oxide layer and forming a gate electrode to be present only in a predetermined portion of the field oxide layer; Forming a drain and a source region on the well region; Forming an interlayer insulating film on the resultant product; Etching a predetermined portion of the interlayer insulating film to form a contact hole; And forming a metal film in the contact hole and the upper portion of the structure, and forming a metal wire by etching a predetermined portion thereof. 제3항에 있어서, 상기 웰을 형성하는 불순물은 소오스, 드레인을 형성하는 불순물과 동일한 타입을 가진 것을 특징으로 하는 정전기 방지용 필드 트랜지스터 형성방법.4. The method of claim 3, wherein the impurities forming the wells have the same type as the impurities forming the source and the drain. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950069472A 1995-12-30 1995-12-30 Antistatic field transistor and its manufacturing method KR970053972A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950069472A KR970053972A (en) 1995-12-30 1995-12-30 Antistatic field transistor and its manufacturing method
JP8356106A JPH1012827A (en) 1995-12-30 1996-12-25 Transistor for electrostatic discharge protection and its manufacture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950069472A KR970053972A (en) 1995-12-30 1995-12-30 Antistatic field transistor and its manufacturing method

Publications (1)

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KR970053972A true KR970053972A (en) 1997-07-31

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Application Number Title Priority Date Filing Date
KR1019950069472A KR970053972A (en) 1995-12-30 1995-12-30 Antistatic field transistor and its manufacturing method

Country Status (2)

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JP (1) JPH1012827A (en)
KR (1) KR970053972A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100494143B1 (en) * 1997-12-31 2005-09-02 주식회사 하이닉스반도체 Field transistor structure of semiconductor device
KR100929427B1 (en) * 2003-02-05 2009-12-03 매그나칩 반도체 유한회사 Manufacturing Method of DMOS Transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100494143B1 (en) * 1997-12-31 2005-09-02 주식회사 하이닉스반도체 Field transistor structure of semiconductor device
KR100929427B1 (en) * 2003-02-05 2009-12-03 매그나칩 반도체 유한회사 Manufacturing Method of DMOS Transistor

Also Published As

Publication number Publication date
JPH1012827A (en) 1998-01-16

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