KR970004017A - Static random access memory device and manufacturing method thereof - Google Patents

Static random access memory device and manufacturing method thereof Download PDF

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Publication number
KR970004017A
KR970004017A KR1019950018119A KR19950018119A KR970004017A KR 970004017 A KR970004017 A KR 970004017A KR 1019950018119 A KR1019950018119 A KR 1019950018119A KR 19950018119 A KR19950018119 A KR 19950018119A KR 970004017 A KR970004017 A KR 970004017A
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South Korea
Prior art keywords
oxide film
access memory
memory device
random access
static random
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KR1019950018119A
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Korean (ko)
Inventor
김규철
김영광
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김광호
삼성전자 주식회사
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Priority to KR1019950018119A priority Critical patent/KR970004017A/en
Publication of KR970004017A publication Critical patent/KR970004017A/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)

Abstract

풀다운 트랜지스터의 드라이브 전류를 증가시킬 수 있는 스태틱 랜덤 억세스 메모리소자 및 그 제조방법에 대해 기재되어 있다. 이는 두개의 패스 트랜지스터와 두개의 풀다운 트랜지스터를 구비하는 스태틱 랜덤 억세스 메모리소자에 있어서, 상기 풀다운 트랜지스터의 게이트절연막의 등가산화막의 두께가 상기 패스 트랜지스터의 게이트 절연막의 등가산화막 두께보다 작은 것을 특징으로 한다. 따라서, 셀비를 증대시킬 수 있다.A static random access memory device capable of increasing the drive current of a pull-down transistor and a method of manufacturing the same are described. In the static random access memory device having two pass transistors and two pull-down transistors, the thickness of the equivalent oxide film of the gate insulating film of the pull-down transistor is smaller than the equivalent oxide film thickness of the gate insulating film of the pass transistor. Therefore, the cell ratio can be increased.

Description

스태틱 랜덤 억세스 메모리소자 및 그 제조방법Static random access memory device and manufacturing method thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 방법에 의해 제조된 스태틱 랜덤 억세스 메모리소자의 개략적인 구조를 도시한 단면도이다. 제4A도는 본 발명에 의한 스태틱 랜덤 억세스 메모리소자를 제조하기 위한 레이아웃도들이다.3 is a sectional view showing a schematic structure of a static random access memory device manufactured by the method of the present invention. 4A is a layout diagram for manufacturing a static random access memory device according to the present invention.

Claims (7)

두개의 패스 트랜지스터와 두개의 풀다운 트랜지스터를 구비하는 스태틱 랜덤 억세스 메모리소자에 있어서, 상기 풀다운 트랜지스터의 게이트 절연막의 등가산화막의 두께가 상기 패스 트랜지스터의 게이트 절연막의 등가산화막 두께보다 작은 것을 특징으로 하는 스태틱 랜덤 억세스 메모리소자.A static random access memory device having two pass transistors and two pull-down transistors, wherein the thickness of the equivalent oxide film of the gate insulating film of the pull-down transistor is smaller than the equivalent oxide film thickness of the gate insulating film of the pass transistor. Access memory device. 제1항에 있어서, 상기 풀다운 트랜지스터의 게이트 절연막은 제1산화막/질화막/제2산화막으로 구성되어 있고, 상기 패스 트랜지스터의 게이트 절연막은 제2산화막으로 구성되어 있는 것을 특징으로 하는 스태틱 랜덤억세스 메모리소자.2. The static random access memory device according to claim 1, wherein the gate insulating film of the pull-down transistor is formed of a first oxide film / nitride film / second oxide film, and the gate insulating film of the pass transistor is formed of a second oxide film. . 제2항에 있어서, 상기 제1 및 제2산화막은 실리콘 열산화막인 것을 특징으로 하는 스태틱 랜덤 억세스메모리소자.3. The static random access memory device of claim 2, wherein the first and second oxide films are silicon thermal oxide films. 제2항에 있어서, 상기 제1산화막 및 질화막의 두께는 각각 50Å정도이고, 상기 풀다운 트랜지스터에서의 제2산화막 두께는 30Å정도이며, 상기 패스 트랜지스터에서의 제2산화막의 두께는 120Å정도인 것을 특징으로 하는 스태틱 랜덤 억세스 메모리소자.The thickness of the first oxide film and the nitride film is about 50 GPa, respectively, and the thickness of the second oxide film in the pull-down transistor is about 30 GPa, and the thickness of the second oxide film in the pass transistor is about 120 GPa. A static random access memory element. 반도체기판 상에 제1산화막과 질화막을 순차적으로 형성하는 제1공정; 패스 트랜지스터의 게이트가 형성될 영역에 형성되어 있는 상기 제1산화막 및 질화막을 제거하는 제2공정; 및 결과물 전면에 제2산화막을 형성하는 제3공정을 포함하는 것을 특징으로 하는 스태틱 랜덤 억세스 메모리소자의 제조방법.A first step of sequentially forming a first oxide film and a nitride film on the semiconductor substrate; A second step of removing the first oxide film and the nitride film formed in the region where the gate of the pass transistor is to be formed; And a third step of forming a second oxide film on the entire surface of the resultant. 제5항에 있어서, 상기 제3공정 후, 상기 제2산화막 상에 도전층을 형성하는 제4공정 및 상기 도전층을 부분적으로 식각하여 패스 트랜지스터 및 풀다운 트랜지스터의 게이트를 형성하는 제5공정을 더 포함하는 것을 특징으로 하는 스태틱 랜덤 억세스 메모리소자의 제조방법.The method of claim 5, further comprising, after the third process, a fourth process of forming a conductive layer on the second oxide film and a fifth process of partially etching the conductive layer to form gates of a pass transistor and a pull-down transistor. A method of manufacturing a static random access memory device, comprising: 제5항에 있어서, 상기 제1 및 제2산화막은 실리콘 열산화방식에 의해 형성되는 것을 특징으로 하는 스태틱 랜덤 억세스 메모리소자의 제조방법.6. The method of claim 5, wherein the first and second oxide films are formed by a silicon thermal oxidation method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950018119A 1995-06-29 1995-06-29 Static random access memory device and manufacturing method thereof KR970004017A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990030770A (en) * 1997-10-06 1999-05-06 윤종용 Composite semiconductor device having an asymmetric gate oxide film structure and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990030770A (en) * 1997-10-06 1999-05-06 윤종용 Composite semiconductor device having an asymmetric gate oxide film structure and manufacturing method thereof

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