KR970052239A - Via contact formation method of semiconductor device - Google Patents

Via contact formation method of semiconductor device Download PDF

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Publication number
KR970052239A
KR970052239A KR1019950050473A KR19950050473A KR970052239A KR 970052239 A KR970052239 A KR 970052239A KR 1019950050473 A KR1019950050473 A KR 1019950050473A KR 19950050473 A KR19950050473 A KR 19950050473A KR 970052239 A KR970052239 A KR 970052239A
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KR
South Korea
Prior art keywords
etching
forming
photoresist pattern
mask
reflection film
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KR1019950050473A
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Korean (ko)
Inventor
이승욱
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김주용
현대전자산업 주식회사
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Priority to KR1019950050473A priority Critical patent/KR970052239A/en
Publication of KR970052239A publication Critical patent/KR970052239A/en

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Abstract

본 발명은 반도체소자의 비이콘택 형성방법에 관한 것으로, 아루미늄으로 형성된 제1금속배선 상부에 티타늄 질화막으로 형성된 반사방지막을 형성하고 그 상부에 평탄화층을 형성한 다음, 콘택마스크를 이용해 형성된 감광막패턴을 마스크로하여 상기 감광막패턴 사부에 언더컷을 형성하고 상기 평탄화층을 건식식각하되, 불소계 가스를 이용한 과도식각을 수반하여 소정두께의 반사방지막을 식각한 다음, 상기 감광막패턴을 마스크로하여 염소계 가스를 이용한 건식방법으로 상기 남아있는 반사방지막 그리고 상기 반사방지막과 제1금속배선의 반응으로 형성된 중간절연막을 식각함으로써 비아콘택홀을 형성하고 후속공정에 제2금속배선을 형성하여 안정된 비아콘택을 형성함으로써 반도체소자의 특성 및 신뢰성을 향상시키고 그에 따른 반도체소자의 고집적화를 가능하게 하는 기술이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a non-contact of a semiconductor device, comprising forming an anti-reflection film formed of a titanium nitride film on an upper portion of a first metal wire formed of aluminum, and forming a planarization layer thereon, and then using a contact mask. Using a mask as an undercut to form an undercut on the photoresist pattern sand and dry etching the planarization layer, followed by etching the anti-reflection film of a predetermined thickness with the transient etching using a fluorine-based gas, and then using the photoresist pattern as a mask In the dry method, a via contact hole is formed by etching the remaining anti-reflection film and the intermediate insulating film formed by the reaction between the anti-reflection film and the first metal wiring, and a second metal wiring is formed in a subsequent process to form a stable via contact. Improve the characteristics and reliability of the device It is a technology for enabling high integration party.

Description

반도체소자의 비아콘택 형성방법Via contact formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도 내지 제1C도는 본 발명의 실시예에 따른 반도체소자의 비아콘택 형성공정을 도시한 단면도.1A to 1C are cross-sectional views illustrating a via contact forming process of a semiconductor device in accordance with an embodiment of the present invention.

Claims (7)

제1금속배선 상부에 반사방지막을 소정두께 형성하는 공정과, 상기 반사방지막 상부에 평탄화층을 형성하는 공정과, 상기 평탄화층 상부에 감광막패턴을 형성하는 공정과, 상기 감광막패턴을 마스크로하여 상기 평탄화층을 소정두께 등방성 식각하되, 상기 감광막패턴 하부에 언더컷을 형성하는 공정과, 상기 감광막패턴을 마스크로하여 상기 평탄화층을 건식식각하되, 불소계 가스를 이용한 과도식각으로 상기 반사방지막을 소정두께 식각하는 공정과, 상기 감광막패턴을 마스크로하여 상기 남아 있는 반사방지막 그리고 상기 반사방지막과 제1금속배선의 반응으로 형성된 중간절연막을 식각하되, 염소계 가스를 이용한 건식식각공정으로 비아콘택홀을 형성하는 공정을 포함하는 반도체소자의 비아콘택 형성방법.Forming a predetermined thickness of the antireflection film on the first metal wiring, forming a planarization layer on the antireflection film, forming a photoresist pattern on the planarization layer, and using the photoresist pattern as a mask. Etching the planarization layer to a predetermined thickness, and forming an undercut under the photoresist pattern, and dry etching the planarization layer using the photoresist pattern as a mask, and etching the antireflection coating to a predetermined thickness by transient etching using a fluorine-based gas. And etching the remaining anti-reflection film and the intermediate insulating film formed by the reaction between the anti-reflection film and the first metal wiring by using the photoresist pattern as a mask, and forming a via contact hole by a dry etching process using chlorine gas. Via contact forming method of a semiconductor device comprising a. 제1항에 있어서, 상기 제1금속배선은 알루미늄으로 형성되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the first metal wiring is formed of aluminum. 제1항에 있어서, 상기 반사방지막은 티타늄질화막으로 형성되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the anti-reflection film is formed of a titanium nitride film. 제1항에 있어서, 상기 감광막패턴은 콘택마스크를 이용한 노광 및 현상공정으로 형성되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the photoresist pattern is formed by an exposure and development process using a contact mask. 제1항에 있어서, 상기 불소계 가스를 이용한 과도식각은 식각목표의 50 내지 120 퍼센트로 실시되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the over-etching using the fluorine-based gas is performed at 50 to 120 percent of the etching target. 제1항에 있어서, 상기 염소계 가스를 이용한 건식식각은 과도식각이 수반되어 상기 제1금속배선이 소정두께 식각되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the dry etching using the chlorine-based gas involves transient etching so that the first metal wiring is etched to a predetermined thickness. 제1항에 있어서, 상기 염소계 가스를 이용한 과도식각은 식각목표의 0 내지 50 퍼센트로 실시되는 것을 특징으로 하는 반도체소자의 비아콘택 형성방법.The method of claim 1, wherein the transient etching using the chlorine-based gas is performed at 0 to 50 percent of the etching target. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950050473A 1995-12-15 1995-12-15 Via contact formation method of semiconductor device KR970052239A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596900B1 (en) * 1999-06-10 2006-07-04 주식회사 하이닉스반도체 Method for forming via contact of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100596900B1 (en) * 1999-06-10 2006-07-04 주식회사 하이닉스반도체 Method for forming via contact of semiconductor device

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