KR970049347A - Pen drive digitizer panel drive circuit - Google Patents

Pen drive digitizer panel drive circuit Download PDF

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Publication number
KR970049347A
KR970049347A KR1019950069704A KR19950069704A KR970049347A KR 970049347 A KR970049347 A KR 970049347A KR 1019950069704 A KR1019950069704 A KR 1019950069704A KR 19950069704 A KR19950069704 A KR 19950069704A KR 970049347 A KR970049347 A KR 970049347A
Authority
KR
South Korea
Prior art keywords
signal
delay means
output signal
decoding
receiving
Prior art date
Application number
KR1019950069704A
Other languages
Korean (ko)
Other versions
KR0170726B1 (en
Inventor
김도윤
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to KR1019950069704A priority Critical patent/KR0170726B1/en
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to GB9725009A priority patent/GB2316179B/en
Priority to CNB021527156A priority patent/CN1226697C/en
Priority to CNB021527148A priority patent/CN1195351C/en
Priority to US08/981,177 priority patent/US6043810A/en
Priority to DE19681453T priority patent/DE19681453B4/en
Priority to CN96194766A priority patent/CN1108585C/en
Priority to PCT/KR1996/000089 priority patent/WO1996042068A1/en
Priority to TW085107049A priority patent/TW319848B/zh
Priority to JP50293697A priority patent/JP3889046B2/en
Priority to KR1020007000859A priority patent/KR100262726B1/en
Priority to GB9926443A priority patent/GB2340613B/en
Priority to KR1019970706040A priority patent/KR100262725B1/en
Publication of KR970049347A publication Critical patent/KR970049347A/en
Application granted granted Critical
Publication of KR0170726B1 publication Critical patent/KR0170726B1/en
Priority to CNB02152713XA priority patent/CN1210675C/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/033—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor
    • G06F3/0354—Pointing devices displaced or positioned by the user, e.g. mice, trackballs, pens or joysticks; Accessories therefor with detection of 2D relative movements between the device, or an operating part thereof, and a plane or surface, e.g. 2D mice, trackballs, pens or pucks
    • G06F3/03545—Pens or stylus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00—Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041—Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04106—Multi-sensing digitiser, i.e. digitiser using at least two different sensing technologies simultaneously or alternatively, e.g. for detecting pen and finger, for saving power or for improving position detection

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Position Input By Displaying (AREA)

Abstract

회로가 단순한 펜 디지타이저의 패널 구동 회로를 공개한다. 그 구동 회로는 클럭신호를 입력받아 한 주기씩 지연함에 의해 12주기마다 반복되는 제1구형파를 발생하는 제1지연수단; 상기 제1지연수단의 출력신호를 한 주기 지연 출력함에 의해 제2구형파를 발생하는 제2지연수단; 상기 제1 및 제2구형파를 입력받아 이를 디코딩하는 디코딩수단; 및 제1지연수단의 출력신호와 그 반전신호와 제2지연수단의 출력신호와 그 반전신호 그리고 상기 디코딩수단의 출력신호를 입력받아 모드 선택신호에 따라 스타일러스 모드 혹은 핑거 모드의 패널 구동신호를 선택적으로 출력하는 신호 선택수단을 구비한 것을 특징으로 한다. 본 발명에 의하면, 회로를 단순화시킬 수 있다.The circuit discloses a panel drive circuit of a simple pen digitizer. The driving circuit includes: first delay means for generating a first square wave repeated every 12 cycles by receiving a clock signal and delaying the clock signal by one cycle; Second delay means for generating a second square wave by outputting the output signal of the first delay means by one period; Decoding means for receiving the first and second square waves and decoding them; And selecting a panel driving signal of a stylus mode or a finger mode according to a mode selection signal by receiving an output signal of the first delay means, an inverted signal thereof, an output signal of the second delay means, an inverted signal thereof, and an output signal of the decoding means. Characterized in that the signal selection means for outputting. According to the present invention, the circuit can be simplified.

Description

펜 디지타이저의 패널 구동 회로Pen drive digitizer panel drive circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 따른 펜 디지타이저의 패널 구동 회로를 설명하기 위한 구성 블록도.3 is a block diagram illustrating the panel driving circuit of the pen digitizer according to the present invention.

제4a도 및 제4b도는 제3도의 펜 디지타이저의 패널 구동 회로의 동작을 설명하기 위한 동작 파형도.4A and 4B are operational waveform diagrams for explaining the operation of the panel driving circuit of the pen digitizer of FIG.

Claims (6)

클럭신호를 입력받아 한 주기씩 지연함에 의해 12주기마다 반복되는 제1구형파를 발생하는 제1지연수단; 상기 제1지연수단의 출력 신호를 한 주기 지연 출력함에 의해 제2구형파를 발생하는 제2지연수단; 및 상기 제1 및 제2구형파를 입력받아 이를 디코딩하는 디코딩수단; 제1지연수단의 출력 신호와 그 반전신호와 제2지연수단의 출력신호와 그 반전신호 그리고 상기 디코딩수단의 출력신호를 입력받아 모드 선택신호에 따라 스타일러스 모드 혹은 핑거 모드의 패널 구동신호를 선택적으로 출력하는 신호 선택수단을 구비한 것을 특징으로 하는 펜 디지타이저의 패널 구동회로.First delay means for generating a first square wave which is repeated every 12 cycles by receiving a clock signal and delaying it by one cycle; Second delay means for generating a second square wave by outputting the output signal of the first delay means by one period; Decoding means for receiving the first and second square waves and decoding them; The panel driving signal of the stylus mode or the finger mode is selectively selected according to the mode selection signal by receiving the output signal of the first delay means, the inverted signal thereof, the output signal of the second delay means, the inverted signal thereof, and the output signal of the decoding means. A panel drive circuit of a pen digitizer, comprising: a signal selecting means for outputting. 제1항에 있어서, 상기 제1지연수단은 12비트 카운터로 구성되고, 12번째 출력 비트를 상기 제1구형파로서 출력하는 것을 특징으로 하는 펜 디지타이저의 패널 구동회로.2. The panel drive circuit of claim 1, wherein the first delay means comprises a 12-bit counter and outputs a 12th output bit as the first square wave. 제1항에 있어서, 상기 제2지연수단은 적어도 2비트 이상의 카운터로 구성하고, 2번째 출력 비트를 상기 제2구형파로서 출력하는 것을 특징으로 하는 펜 디지타이저의 패널 구동회로.2. The panel driving circuit of claim 1, wherein the second delay means comprises at least two bits or more of counters and outputs a second output bit as the second square wave. 제2항에 있어서, 상기 제1지연수단은 리셋신호에 따라 동작을 리셋 시킴에 의해 소비 전류를 줄일 수 있는 것을 특징으로 하는 펜 디지타이저의 패널 구동 회로.3. The panel driving circuit of claim 2, wherein the first delay means can reduce current consumption by resetting the operation according to a reset signal. 제3항에 있어서, 상기 제2지연수단은 리셋신호에 따라 동작을 리셋 시킴에 의해 소비 전류를 줄일 수 있는 것을 특징으로 하는 펜 디지타이저의 패널 구동회로.4. The panel driving circuit of claim 3, wherein the second delay means reduces the current consumption by resetting the operation according to a reset signal. 제1항에 있어서, 상기 디코딩수단은 2×4 디코더로 구성하는 것을 특징으로 하는 펜 디지타이저의 패널 구동회로.A panel driving circuit of a pen digitizer according to claim 1, wherein said decoding means comprises a 2x4 decoder. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950069704A 1995-06-12 1995-12-30 Panel driving circuit of pen digitizer KR0170726B1 (en)

Priority Applications (14)

Application Number Priority Date Filing Date Title
KR1019950069704A KR0170726B1 (en) 1995-12-30 1995-12-30 Panel driving circuit of pen digitizer
TW085107049A TW319848B (en) 1995-06-12 1996-06-12
CNB021527148A CN1195351C (en) 1995-06-12 1996-06-12 Digital instrument controller
US08/981,177 US6043810A (en) 1995-06-12 1996-06-12 Digitizer controller
DE19681453T DE19681453B4 (en) 1995-06-12 1996-06-12 Digitizer controller, semiconductor integrated circuit, and tablet driver control signal generator
CN96194766A CN1108585C (en) 1995-06-12 1996-06-12 Digitizer controller
GB9725009A GB2316179B (en) 1995-06-12 1996-06-12 Digitizer controller
CNB021527156A CN1226697C (en) 1995-06-12 1996-06-12 Digital instrument controller
JP50293697A JP3889046B2 (en) 1995-06-12 1996-06-12 Digitizer controller
KR1020007000859A KR100262726B1 (en) 1995-06-12 1996-06-12 Digitizer controller
GB9926443A GB2340613B (en) 1995-06-12 1996-06-12 Digitizer controller
KR1019970706040A KR100262725B1 (en) 1995-06-12 1996-06-12 Digitizer controller
PCT/KR1996/000089 WO1996042068A1 (en) 1995-06-12 1996-06-12 Digitizer controller
CNB02152713XA CN1210675C (en) 1995-06-12 2002-11-20 Digitizer controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950069704A KR0170726B1 (en) 1995-12-30 1995-12-30 Panel driving circuit of pen digitizer

Publications (2)

Publication Number Publication Date
KR970049347A true KR970049347A (en) 1997-07-29
KR0170726B1 KR0170726B1 (en) 1999-03-30

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ID=19448537

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Application Number Title Priority Date Filing Date
KR1019950069704A KR0170726B1 (en) 1995-06-12 1995-12-30 Panel driving circuit of pen digitizer

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KR (1) KR0170726B1 (en)

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KR0170726B1 (en) 1999-03-30

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