KR970049050A - Ambient Exposure Mask for Semiconductor Wafers - Google Patents

Ambient Exposure Mask for Semiconductor Wafers Download PDF

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Publication number
KR970049050A
KR970049050A KR1019950050638A KR19950050638A KR970049050A KR 970049050 A KR970049050 A KR 970049050A KR 1019950050638 A KR1019950050638 A KR 1019950050638A KR 19950050638 A KR19950050638 A KR 19950050638A KR 970049050 A KR970049050 A KR 970049050A
Authority
KR
South Korea
Prior art keywords
exposure
mask
semiconductor wafer
peripheral
pattern forming
Prior art date
Application number
KR1019950050638A
Other languages
Korean (ko)
Other versions
KR0179778B1 (en
Inventor
라광일
Original Assignee
문정환
Lg 반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, Lg 반도체주식회사 filed Critical 문정환
Priority to KR1019950050638A priority Critical patent/KR0179778B1/en
Publication of KR970049050A publication Critical patent/KR970049050A/en
Application granted granted Critical
Publication of KR0179778B1 publication Critical patent/KR0179778B1/en

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/44—Testing or measuring features, e.g. grid patterns, focus monitors, sawtooth scales or notched scales
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/42—Alignment or registration features, e.g. alignment marks on the mask substrates

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

본 발명은 반도체 웨이퍼의 주변노광용 마스크에 관한 것으로, 종래 기술에 의한 반도체 웨이퍼의 주변노광용 마스크를 일반적인 공정의 디바이스에서는 별다른 문제가 없으나, WSIX를 사용하는 디바이스의 경우에는 패턴형성부위와 에지노광부위 사이에서 필링(PEELING)현상이 발생되는 문제가 있는 바, 주 패턴형성부위에만 크롬(11)이 형성되어 있고, 나머지는 투명유리판(12)으로 형성된 본 바렴에 의한 반도체 웨이퍼의 주변 노광용 마스크를 제공하여 노광시 웨이퍼의 에지 부위의 포토 레지스트를 완전히 제거하도록 하여 에치 공정의 진행시에는 패턴의 형성 부위를 제외하고는 모든 패턴이 제거(에치)되며, 이에 따라 바이-메탈 현상에 의해 필링 현상의 발생을 방지하도록 한 것이다.The present invention relates to a peripheral exposure mask of the semiconductor wafer, a peripheral mask for exposure of a semiconductor wafer according to the prior art device of the general process, but are no major problems, in the case of a device using the WSI X, the pattern forming portion and an edge exposure portion There is a problem that peeling occurs between the chromium 11 is formed only in the main pattern forming portion, the remainder is provided with a transparent glass plate 12 to provide a mask for peripheral exposure of the semiconductor wafer. The photoresist at the edge portion of the wafer is completely removed during exposure, and during the etch process, all patterns except for the pattern formation portion are removed (etched). Thus, peeling phenomenon occurs due to bi-metal development. It is to prevent.

Description

반도체 웨이퍼의 주변노광용 마스크Ambient Exposure Mask for Semiconductor Wafers

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 반도체 웨이퍼의 주변노광용 마스크.3 is a peripheral exposure mask of a semiconductor wafer according to the present invention.

Claims (1)

클램프가 포토 레지스트와 겹쳐지는 것을 방지하기 위하여 빛이 투과되지 못하도록 하는 광파단부로서 크롬을 패턴형성부위에만 형성하고, 나머지 부위는 빛을 투과하는 광통과부로서 투명유리판으로 형성한 것을 특징으로 하는 반도체 웨이퍼의 주변노광용 마스크.In order to prevent the clamp from overlapping with the photoresist, chromium is formed only at the pattern forming portion as a light breaking portion to prevent light from being transmitted, and the remaining portion is formed as a transparent glass plate as a light passing portion for transmitting light. Mask for wafer exposure. ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the original application.
KR1019950050638A 1995-12-15 1995-12-15 Exposure mask for wafer of semiconductor KR0179778B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950050638A KR0179778B1 (en) 1995-12-15 1995-12-15 Exposure mask for wafer of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950050638A KR0179778B1 (en) 1995-12-15 1995-12-15 Exposure mask for wafer of semiconductor

Publications (2)

Publication Number Publication Date
KR970049050A true KR970049050A (en) 1997-07-29
KR0179778B1 KR0179778B1 (en) 1999-04-01

Family

ID=19440559

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950050638A KR0179778B1 (en) 1995-12-15 1995-12-15 Exposure mask for wafer of semiconductor

Country Status (1)

Country Link
KR (1) KR0179778B1 (en)

Also Published As

Publication number Publication date
KR0179778B1 (en) 1999-04-01

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