KR970030812A - Nonvolatile Semiconductor Memory Device and Manufacturing Method Thereof - Google Patents

Nonvolatile Semiconductor Memory Device and Manufacturing Method Thereof Download PDF

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Publication number
KR970030812A
KR970030812A KR1019950044266A KR19950044266A KR970030812A KR 970030812 A KR970030812 A KR 970030812A KR 1019950044266 A KR1019950044266 A KR 1019950044266A KR 19950044266 A KR19950044266 A KR 19950044266A KR 970030812 A KR970030812 A KR 970030812A
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South Korea
Prior art keywords
layer
memory device
semiconductor memory
insulating film
film
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KR1019950044266A
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Korean (ko)
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심병섭
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김광호
삼성전자 주식회사
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Priority to KR1019950044266A priority Critical patent/KR970030812A/en
Publication of KR970030812A publication Critical patent/KR970030812A/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42324—Gate electrodes for transistors with a floating gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)

Abstract

소자 분리가 우수한 필드 절연막을 구비한 반도체 장치 및 그 제조방법에 관하여 개시한다. 본 발명은 반도체 기판에 필드 절연막을 형성하여 액티브 영역을 한정하는 비휘발성 반도체 메모리 장치에 있어서, 상기 필드 절연막의 중앙 부분은 돔 형태로 그 두께가 양쪽 주변보다 두꺼운 것을 특징으로 하는 비휘발성 반도체 메모리 장치를 제공한다. 본 발명에 의하여 형성된 필드 절연막은 안정한 소자 분리 특성을 나타낸다. 또한, 본 발명은 효과적인 액티브 영역을 활용하는 것이 가능하며, 액티브 영역의 접합 파괴 전압이 향상되는 효과가 있다.Disclosed are a semiconductor device having a field insulating film excellent in device isolation, and a manufacturing method thereof. A nonvolatile semiconductor memory device in which a field insulating film is formed on a semiconductor substrate to define an active region, wherein a central portion of the field insulating film has a dome shape and a thickness thereof is thicker than both sides. To provide. The field insulating film formed by the present invention exhibits stable device isolation characteristics. In addition, the present invention can utilize an effective active region, and the junction breakdown voltage of the active region is improved.

Description

비휘발성 반도체 메모리 장치 및 그 제조방법Nonvolatile Semiconductor Memory Device and Manufacturing Method Thereof

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도 내지 제5도는 본 발명에 의한 비휘발성 반도체 메모리 장치의 제조방법을 설명하기 위하여 나타낸 단면도들이다.2 to 5 are cross-sectional views illustrating a method of manufacturing a nonvolatile semiconductor memory device according to the present invention.

Claims (9)

반도체 기판에 필드 절연막을 형성하여 액티브 영역을 한정하는 비휘발성 반도체 메모리 장치에 있어서, 상기 필드 절연막의 중앙 부분은 돔 형태로 그 두께가 양쪽 주변보다 두꺼운 것을 특징으로 하는 비휘발성 반도체 메모리 장치.A nonvolatile semiconductor memory device in which a field insulating film is formed on a semiconductor substrate to define an active region, wherein a central portion of the field insulating film has a dome shape and a thickness thereof is thicker than both sides. 제1항에 있어서, 상기 액티브 영역 상에 터널 절연막과, 상기 터널 절연막 상에 상기 필드 절연막의 일부와 오버랩 되어 형성된 부유 게이트와, 상기 부유 게이트 상에 유전체층 및 조절 게이트가 형성되어 있는 것을 특징으로 하는 비휘발성 반도체 메모리 장치.The method of claim 1, wherein a tunnel insulating film is formed on the active region, a floating gate formed to overlap a portion of the field insulating film on the tunnel insulating film, and a dielectric layer and a control gate are formed on the floating gate. Nonvolatile Semiconductor Memory Device. 제2항에 있어서, 상기 부유 게이트는 폴리실리콘층으로 구성하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치.3. The nonvolatile semiconductor memory device according to claim 2, wherein the floating gate is formed of a polysilicon layer. 제2항에 있어서, 상기 유전층은 실리콘 산화막 또는 실리콘 질화막의 단일층 또는 실리콘 산화막 및 실리콘 질화막의 복합층으로 구성하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치.The nonvolatile semiconductor memory device of claim 2, wherein the dielectric layer comprises a single layer of a silicon oxide film or a silicon nitride film or a composite layer of a silicon oxide film and a silicon nitride film. 제3항에 있어서, 상기 조절 게이트는 폴리실리콘막의 단일층 또는 폴리실리콘막과 금속실리사이드층의 복합층으로 구성하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치.4. The nonvolatile semiconductor memory device according to claim 3, wherein the control gate is composed of a single layer of a polysilicon film or a composite layer of a polysilicon film and a metal silicide layer. 반도체 기판에 필드 절연막을 형성하는 액티브 영역을 한정하는 단계; 상기 액티브 영역에 터널 절연막을 형성하는 단계; 상기 터널 절연막이 형성된 반도체 기판의 전면에 제1 도전층 및 제1 절연층을 순차적으로 형성하는 단계; 상기 제1 절연층을 패터닝하여 상기 필드 절연막 상부의 제1 도전층 일부가 노출되는 제1 절연층 패턴을 형성하는 단계; 및 상기 노출된 제1 도전층을 산화하여 부유 게이트용 제1 도전층 패턴을 형성함과 동시에 상기 필드 절연막은 중앙 부분이 돔 형태로 주변보다 두꺼운 형태를 갖는 단계를 구비하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치의 제조 방법.Defining an active region for forming a field insulating film in the semiconductor substrate; Forming a tunnel insulating film in the active region; Sequentially forming a first conductive layer and a first insulating layer on an entire surface of the semiconductor substrate on which the tunnel insulating film is formed; Patterning the first insulating layer to form a first insulating layer pattern exposing a portion of the first conductive layer on the field insulating layer; And oxidizing the exposed first conductive layer to form a first conductive layer pattern for a floating gate, and at the same time, the field insulating layer has a central portion having a dome shape and a thicker shape than the periphery. Method of manufacturing a semiconductor memory device. 제6항에 있어서, 상기 제1 도전층은 폴리실리콘층으로 형성하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치의 제조 방법.The method of claim 6, wherein the first conductive layer is formed of a polysilicon layer. 제6항에 있어서, 상기 제1 절연층은 실리콘 질화막으로 형성하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치의 제조 방법.The method of claim 6, wherein the first insulating layer is formed of a silicon nitride film. 제6항에 있어서, 상기 돔 형태의 필드 절연막을 형성하는 단계 후에 상기 제1 절연층 패턴을 제거하는 단계와, 상기 제1 도전층 패턴상에 유전체층 및 조절 게이트를 형성하는 단계를 더 구비하는 것을 특징으로 하는 비휘발성 반도체 메모리 장치의 제조 방법.The method of claim 6, further comprising: removing the first insulating layer pattern after forming the dome-shaped field insulating layer, and forming a dielectric layer and a control gate on the first conductive layer pattern. A method of manufacturing a nonvolatile semiconductor memory device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950044266A 1995-11-28 1995-11-28 Nonvolatile Semiconductor Memory Device and Manufacturing Method Thereof KR970030812A (en)

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