KR970029085A - Apparatus and method for shape area design of PCI device using MUX - Google Patents

Apparatus and method for shape area design of PCI device using MUX Download PDF

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Publication number
KR970029085A
KR970029085A KR1019950042595A KR19950042595A KR970029085A KR 970029085 A KR970029085 A KR 970029085A KR 1019950042595 A KR1019950042595 A KR 1019950042595A KR 19950042595 A KR19950042595 A KR 19950042595A KR 970029085 A KR970029085 A KR 970029085A
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KR
South Korea
Prior art keywords
mux
pci bus
read
input
shape region
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KR1019950042595A
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Korean (ko)
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KR0162763B1 (en
Inventor
정하재
김현기
이진
송경준
채영도
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양승택
한국전자통신연구원
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Priority to KR1019950042595A priority Critical patent/KR0162763B1/en
Publication of KR970029085A publication Critical patent/KR970029085A/en
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Publication of KR0162763B1 publication Critical patent/KR0162763B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0024—Peripheral component interconnect [PCI]

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 먹스(MUX : multiplexer)를 이용한 PCI 디바이스의 형상영역 설계 장치 및 방법에 관한 것이다.The present invention relates to an apparatus and method for designing a shape region of a PCI device using a multiplexer (MUX).

본 발명은 입/출력 디코더, PCI 버스에서 출력되는 어드레스 신호와 제어신호를 입력으로 하여 소정의 PCI 디바이스의 형상영역의 상태 정보를 읽거나 쓰는 형성 읽기/쓰기 로직; 읽기/쓰기 상태를 나타내는 읽기/쓰기 상태 머신 로직; 여러 개의 형상영역 데이터를 PCI 버스를 통하여 호스트에 전달하는 먹스; 상기 먹스로부터의 데이터를 PCI 버스에 전달하는 버퍼; 상기 먹스의 입력을 선택하는 먹스 선택 회로; 및 인터럽트 번호를 지정하기 위한 래치로 구성됨을 특징으로 하는 PCI 디바이스의 형상 영역을 용이하게 설계할 수 있는 효과를 가진다.The present invention provides an input / output decoder, formed read / write logic that reads or writes state information of a shape region of a predetermined PCI device by inputting an address signal and a control signal output from a PCI bus; Read / write state machine logic representing a read / write state; MUX for transmitting a plurality of configuration area data to the host through the PCI bus; A buffer for transferring data from the mux to a PCI bus; A mux selection circuit for selecting an input of the mux; And a latch for designating an interrupt number, which has the effect of easily designing a shape region of the PCI device.

Description

먹스를 이용한 PCI 디바이스의 형상영역 설계장치 및 방법Apparatus and method for shape area design of PCI device using MUX

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 의한 형상영역 설계 장치의 구성도,1 is a configuration diagram of a shape region design apparatus according to the present invention,

제2도는 본 발명에 의한 형상영역 설계 방법을 나타낸 흐름도.2 is a flowchart showing a shape region design method according to the present invention.

Claims (2)

PCI 버스에 연결되며, PCI 버스에서 출력되는 어드레스 신호로부터 입/출력 여부를 디코딩하는 출력하는 입/출력 디코더; PCI 버스에서 연결되며, PCI 버스에서 출력되는 어드레스 신호와 제어신호를 입력으로 하여 소정의 PCI 디바이스의 형상영역의 상태 정보를 읽거나 쓰는 형성 읽기/쓰기 로직; 상기 입/출력 디코더와 상기 형성 읽기/쓰기로부터의 출력을 입력으로 하여 읽기/쓰기 상태를 나타내는 읽기/쓰기 상태 머신로직; 여러 개의 형상영역 데이터를 PCI 버스를 통하여 호스트에 전달하는 먹스; PCI 버스와 먹스사이에 연결되며, 상기 먹스로부터의 데이터를 PCI 버스에 전달하는 버퍼; 상기 먹스의 입력을 선택하는 먹스 선택 회로; 및 PCI 버스와 먹스 사이에 연결되어, 인터럽트 번호를 지정하기 위한 래치로 구성됨을 특징으로 하는 먹스를 이용한 PCI 디바이스의 형상 영역 설계 장치.An input / output decoder connected to the PCI bus and outputting whether input / output is decoded from an address signal output from the PCI bus; A formed read / write logic connected to the PCI bus and reading or writing state information of a shape area of a predetermined PCI device by inputting an address signal and a control signal output from the PCI bus; A read / write state machine logic for indicating a read / write state by inputting the input / output decoder and the output from the formed read / write; MUX for transmitting a plurality of configuration area data to the host through the PCI bus; A buffer coupled between the PCI bus and the mux, for transferring data from the mux to the PCI bus; A mux selection circuit for selecting an input of the mux; And a latch connected between the PCI bus and the mux, the latch configured to designate an interrupt number. 형상영역가능 레지스터의 상위 니블에 0이 아닌 값을 쓰므로써 형상영역을 사용할 수 있도록 하는 제1단계; 개발자 번호를 읽어 원하는 개발자인지 확인한 다음, 원하는 개발자를 찾았을 경우, 원하는 디바이스인지 확인하는 제2단계; 사용자가 원하는 베이스 어드레스, 인터럽트 라인 등의 형상영역을 설정하는 제3단계; 및 형상영역가능 레지스터의 상위 니블에 0을 써서 형상영역의 설정이 끝났음을 알리는 제4단계로 수행되는 것을 특징으로 하는 먹스를 이용한 PCI 디바이스 형상영역의 설계방법.A first step of enabling the shape region to be used by writing a non-zero value to an upper nibble of the shape region capable register; Reading a developer number to check whether a desired developer is found, and then finding a desired developer, determining whether the desired device is a desired device; A third step of setting a shape area such as a base address and an interrupt line desired by a user; And writing a zero in the upper nibble of the shape region capable register to indicate that the setting of the shape region is completed. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950042595A 1995-11-21 1995-11-21 Apparatus and method for implementing the configuration space of a pci device using mux KR0162763B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950042595A KR0162763B1 (en) 1995-11-21 1995-11-21 Apparatus and method for implementing the configuration space of a pci device using mux

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Application Number Priority Date Filing Date Title
KR1019950042595A KR0162763B1 (en) 1995-11-21 1995-11-21 Apparatus and method for implementing the configuration space of a pci device using mux

Publications (2)

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KR970029085A true KR970029085A (en) 1997-06-26
KR0162763B1 KR0162763B1 (en) 1999-01-15

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