KR920001309A - Font Data Read / Write Device of Video Card - Google Patents

Font Data Read / Write Device of Video Card Download PDF

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Publication number
KR920001309A
KR920001309A KR1019900009361A KR900009361A KR920001309A KR 920001309 A KR920001309 A KR 920001309A KR 1019900009361 A KR1019900009361 A KR 1019900009361A KR 900009361 A KR900009361 A KR 900009361A KR 920001309 A KR920001309 A KR 920001309A
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KR
South Korea
Prior art keywords
input
output
terminal
gate
font
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KR1019900009361A
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Korean (ko)
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KR930002333B1 (en
Inventor
김성규
Original Assignee
심홍주
주식회사 큐닉스컴퓨터
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Priority to KR1019900009361A priority Critical patent/KR930002333B1/en
Publication of KR920001309A publication Critical patent/KR920001309A/en
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Publication of KR930002333B1 publication Critical patent/KR930002333B1/en

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    • GPHYSICS
    • G04HOROLOGY
    • G04GELECTRONIC TIME-PIECES
    • G04G9/00Visual time or date indication means
    • G04G9/08Visual time or date indication means by building-up characters using a combination of indicating elements, e.g. by using multiplexing techniques

Abstract

내용 없음No content

Description

비디오 카드(VIDEO CARD)의 폰트 데이타(FONT DATA) 읽기/쓰기 장치Font Data Read / Write Device of Video Card

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도의 (A)는 비디오 카드별 CPU 메모리상의 비디오 버퍼사용 영역도.(A) of FIG. 1 is a video buffer use area on the CPU memory for each video card.

제1도의 (B)는 폰트 윈도우(FONT WINDOW)가 위치하는 비디오 버퍼 어드레스 표시도.(B) of FIG. 1 is a video buffer address display diagram in which a font window (FONT WINDOW) is located.

제2도는 본 발명의 개략적인 구성을 나타내는 블럭도.2 is a block diagram showing a schematic configuration of the present invention.

Claims (2)

비디오 카드의 폰트(FONT)를 읽고 쓰는 장치에 있어서; 어드레스/제어버스에 연결된 디코더 수단(21), 상기 디코더 수단(21)에 연결되어 제1, 제2입/출력 포트를 통해 출력되는 신호및 리세트 신호를 이용해 선택제어신호를 발생하는 선택 제어수단(22), 데이타 버스 및 상기 디코더 수단(21)의 제1입/출력 포트에 연결된 제1버퍼(23a)와 상기 데이타 버스 및 상기 디코더 수단(21)의 제2입/출력 포트에 연결된 제2버퍼(23b)로 구성되는 버퍼 수단(23), 상기 버퍼수단(23)에 연결되어 폰트 어드레스를 입력하며 캐릭터 선택 어드레스를 출력하는 캐릭터 선택수단(24), 상기 어드레스/제어버스 및 선택 제어수단(22)의 출력단에 연결되어 상기 선택 제어수단(22)의 제어신호에 따라 CPU메모리상에 폰트윈도우가 스위칭 되도록 하는 디코더 및 폰트 선택수단(25), 상기 캐릭터 선택수단(24)과 디코더 및 폰트 선택수단(25)에 연결된 캐릭터 폰트 메모리(26), 및 상기 디코더 및 폰트 선택수단(25)에 연결되어 있고 ROM BIOS 영역 및 비디오 버퍼 영역을 포함하고 있는 CPU 메모리(27)로 구성되어 상기 캐릭터 선택부(24)의 선택 어드레스와 디코더 및 선택부(25)의 출력 신호에 따라 지정된 픈트 윈도우가 CPU메모리 상의 미사용 특정 영역에 스위칭 되어 나타나도록 함을 특징으로 하는 비디오 카드의 폰트 데이타 읽기/쓰기 장치.A device for reading and writing fonts (FONT) of a video card; Decoder means 21 connected to an address / control bus, a signal connected to the decoder means 21 and output through first and second input / output ports And reset signals A first input / output port of the selection control means 22, the data bus and the decoder means 21 for generating a selection control signal using A first buffer 23a and a second input / output port of the data bus and the decoder means 21 connected to the first buffer 23a. A buffer means 23 composed of a second buffer 23b connected to the character means, a character select means 24 connected to the buffer means 23 to input a font address and output a character select address, the address / control bus and A control signal of the selection control means 22 connected to an output terminal of the selection control means 22 Decoder and font selecting means 25 for switching the font window on the CPU memory in accordance with the character font memory 26 connected to the character selecting means 24 and the decoder and font selecting means 25, and the decoder and CPU memory 27, which is connected to the font selecting means 25 and includes a ROM BIOS area and a video buffer area, which comprises a selection address of the character selection unit 24 and an output signal of the decoder and selection unit 25. A font data read / write device for a video card, characterized in that the specified hint window is switched to appear in an unused specific area on the CPU memory. 제1항에 있어서, 상기 선택 제어부(22)는 디코더 수단(21)의 제2입/출력 포트출력신호 및 리세트(RESET) 신호를 입력하여 논리곱하는 제1AND 게이트(203), 디코더 수단(21)의 제1입/출력 포트출력신호 및 리세트 신호를 입력하여 논리곱하는 제2AND게이트(204), 상기 제1및 제2입/출력 포트출력신호를 입력하여 논리곱하는 제3AND게이트(206), 상기 제1입/출력 포트에 클럭 입력단자가 연결되고 제1AND게이트(203)의 출력단에 클리어단자가 연결되며 전원단에 데이타 입력단자가 연결된 제1D플립플롭(201), 상기 제2입/출력 포트에 클럭 입력단자가 연결되고 상기 제2AND 게이트(204)의 출력단에 클리어 단자가 연결되며 전원단에 데이타 입력단자가 연결된 제2D플립플롭(202), 상기 제1 및 제2 D플립플롭 (201,202) 정출력단에 입력단이 연결된 XNOR 게이트(205), 상기 제1 D플립플롭 부출력단, 제1입/출력 포트및 XNOR 게이트(205) 출력단에 연결된 제13입력 OR게이트(207), 상기 제2 D플립플롭 부출력단, 제2입/출력 포트및 XNOR 게이트(205) 출력단에 연결된 제23입력 OR게이트(208), 상기 제1및 제23입력 OR게이트(207,208) 출력단에 연결된 제4AND 게이트(209) 출력단 및 리세트단에 연결된 제5AND 게이트(210), 및 상기 제3AND 게이트(206) 출력단에 클럭 입력단자가 연결되고 상기 제5AND 게이트(210) 출력단에 클리어 단자가 연결되며 전원단에 데이타 입력단자가 연결되어 있고 부출력단을 통해 선택 제어신호를 출력하는 제3D플립플롭(211)으로 구성함을 특징으로 하는 비디오 카드의 폰트 데이타 읽기/쓰기 장치.The second input / output port according to claim 1, wherein said selection control section (22) is a second input / output port of the decoder means (21). First input / output port of the first AND gate 203 and the decoder means 21 for inputting and ANDing the output signal and the reset signal. A second AND gate 204 for inputting and ORing an output signal and a reset signal, and the first and second input / output ports. A third AND gate 206 for inputting and ANDing an output signal and the first input / output port A first D flip-flop 201 and a second input / output port to which a clock input terminal is connected, a clear terminal is connected to an output terminal of the first AND gate 203, and a data input terminal is connected to a power supply terminal. A 2D flip-flop 202, a first and a second D flip-flop 201, 202 connected to a clock input terminal thereof, a clear terminal connected to an output terminal of the second AND gate 204, and a data input terminal connected to a power supply terminal thereof. An XNOR gate 205 having an input coupled to a positive output stage, the first D flip-flop sub-output stage, and a first input / output port And a thirteenth input OR gate 207 connected to an output terminal of the XNOR gate 205, the second D flip-flop sub-output terminal, and a second input / output port. And a fifth AND gate connected to an output terminal of the twenty-third input OR gate 208 connected to an output terminal of the XNOR gate 205, an output terminal of the fourth AND gate 209 connected to an output terminal of the first and twenty-third input OR gates 207, 208, and 210, and a clock input terminal is connected to an output terminal of the third AND gate 206, a clear terminal is connected to an output terminal of the fifth AND gate 210, a data input terminal is connected to a power supply terminal, and a selection control signal is connected through a sub output terminal. 3D flip-flop (211) for outputting the font data reading / writing device of the video card. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900009361A 1990-06-23 1990-06-23 Apparatus for read/write of font data in video card KR930002333B1 (en)

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Application Number Priority Date Filing Date Title
KR1019900009361A KR930002333B1 (en) 1990-06-23 1990-06-23 Apparatus for read/write of font data in video card

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Application Number Priority Date Filing Date Title
KR1019900009361A KR930002333B1 (en) 1990-06-23 1990-06-23 Apparatus for read/write of font data in video card

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KR920001309A true KR920001309A (en) 1992-01-30
KR930002333B1 KR930002333B1 (en) 1993-03-29

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100483899B1 (en) * 2002-06-11 2005-04-15 노바텍 마이크로일렉트로닉스 코포레이션 Method and apparatus for rewriting functions and fonts of a monitor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100483899B1 (en) * 2002-06-11 2005-04-15 노바텍 마이크로일렉트로닉스 코포레이션 Method and apparatus for rewriting functions and fonts of a monitor

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KR930002333B1 (en) 1993-03-29

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