KR970024719A - Real / heral reporting circuit for control by external processor in communication network - Google Patents
Real / heral reporting circuit for control by external processor in communication network Download PDFInfo
- Publication number
- KR970024719A KR970024719A KR1019950034140A KR19950034140A KR970024719A KR 970024719 A KR970024719 A KR 970024719A KR 1019950034140 A KR1019950034140 A KR 1019950034140A KR 19950034140 A KR19950034140 A KR 19950034140A KR 970024719 A KR970024719 A KR 970024719A
- Authority
- KR
- South Korea
- Prior art keywords
- matching device
- mounting
- hernia
- communication network
- real
- Prior art date
Links
Landscapes
- Data Exchanges In Wide-Area Networks (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
본 발명은 통신망에서 정합장치의 실/탈장 보고회로에 관한 것으로서, 종래 고속 프로세서 제어를 수행함에 있어서 정합장치의 실/탈장시 프로세서에 전달해주는 시간지연으로 인해 발생되었던 전체적인 관리 프로세서의 문제점을 해결하기 위해 통신망 관리 프로세서내에서 정합장치의 실장 및 탈장 상태에 상응한 출력신호를 검출하는 정합 장치 장애 검출신호부와, 정합장치내에서 보드와 실장 및 탈장시 공급되는 전원의 제어에 의해 보드의 실장/탈장 상태를 정합장치 장애 검출신호부를 통해 통신망 관리 프로세서에 보고하는 실/탈장 보고부로 구성된 실/탈장 보고 회로를 제공하므로써 디지탈 교환망을 구성하는데 있어서 고속 데이타 처리를 위한 각 정합장치내에 별도의 프로세서를 부실하지 않고도 통신한 관리 프로세서를 통해 정합장치의 실장/탈장 장애 상태를 실시간 관리함으로써 통신망 구성상의 원가를 절감할 수가 있는 것이다.The present invention relates to a thread / heral reporting circuit of a matching device in a communication network, and to solve the problem of the overall management processor, which is caused by a time delay that is transmitted to the processor when the matching / mounting of the matching device is performed in performing the conventional high speed processor control. In order to mount / unmount the board by controlling the matching device fault detection signal unit for detecting an output signal corresponding to the mounting and mounting state of the matching device in the communication network management processor, and the power supplied to the board and the mounting and dismounting in the matching device. By providing a real / hernia reporting circuit composed of a real / hernia reporting unit that reports a hernia status to a communication network management processor through a matching device failure detection signal unit, a separate processor is provided in each matching device for high-speed data processing in configuring a digital switching network. Management processor communicates without Real-time management of the mounting / hernia failure status can reduce the cost of network configuration.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제4도는 본 발명에 따른 통신망에서 정합장치의 실/탈장 보고회로도.4 is a seal / hernia reporting circuit diagram of a matching device in a communication network according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034140A KR970024719A (en) | 1995-10-05 | 1995-10-05 | Real / heral reporting circuit for control by external processor in communication network |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034140A KR970024719A (en) | 1995-10-05 | 1995-10-05 | Real / heral reporting circuit for control by external processor in communication network |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970024719A true KR970024719A (en) | 1997-05-30 |
Family
ID=66583475
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950034140A KR970024719A (en) | 1995-10-05 | 1995-10-05 | Real / heral reporting circuit for control by external processor in communication network |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970024719A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100346115B1 (en) * | 2000-05-24 | 2002-08-01 | 삼성전자 주식회사 | Apparatus for processing alarm in private wireless exchange system |
KR100350317B1 (en) * | 1999-11-30 | 2002-08-28 | 엘지전자 주식회사 | method for board testing in communication system |
-
1995
- 1995-10-05 KR KR1019950034140A patent/KR970024719A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100350317B1 (en) * | 1999-11-30 | 2002-08-28 | 엘지전자 주식회사 | method for board testing in communication system |
KR100346115B1 (en) * | 2000-05-24 | 2002-08-01 | 삼성전자 주식회사 | Apparatus for processing alarm in private wireless exchange system |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES2058661T3 (en) | PROCEDURE TO ENSURE THE TRANSMISSION OF DATA IN A LINEAR COMPUTER NETWORK. | |
KR910009008A (en) | Fault detection and bandwidth monitoring device | |
KR970024719A (en) | Real / heral reporting circuit for control by external processor in communication network | |
KR910008578A (en) | Interrupt Notification Method | |
US4201897A (en) | Ringing voltage transfer circuit | |
JPS5698033A (en) | Switching system of standby transmission line | |
KR910019367A (en) | Norwood device | |
CN1269642A (en) | Ringing current generator standy-by method and device | |
KR880700606A (en) | System processor interface unit | |
KR960027601A (en) | Optical switching device | |
KR100242691B1 (en) | Circuit for controlling count of a up/down counter | |
KR910013809A (en) | Redundant Circuit of Electronic Switching Alarm Drive | |
KR950035175A (en) | Clock failure detection device | |
US6717911B1 (en) | Telecommunications switching circuit using tri-state buffers | |
KR980007343A (en) | Hernia Detection Device Using Backboard in Electronic Switching System | |
KR980007340A (en) | Redundant communication device between processor and device of electronic switching system | |
KR960020166A (en) | Physical Layer Hierarchy Control Unit | |
KR980007357A (en) | Matching Device Transmitter in Electronic Switching System | |
SU1691855A1 (en) | Device for signaling of substation | |
SU1705804A1 (en) | Tracking system control device | |
KR970702650A (en) | TELECOMMUNICATIONS NETWORKS | |
SU1513456A1 (en) | Device for monitoring time marks | |
JPH01296730A (en) | Digital transmission system | |
KR970049290A (en) | Multiplexing system | |
KR930015463A (en) | Dual Packet Bus Selection Circuit of Packet Processing Equipment |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |