KR970023389A - Semiconductor memory cell placement method - Google Patents
Semiconductor memory cell placement method Download PDFInfo
- Publication number
- KR970023389A KR970023389A KR1019950034946A KR19950034946A KR970023389A KR 970023389 A KR970023389 A KR 970023389A KR 1019950034946 A KR1019950034946 A KR 1019950034946A KR 19950034946 A KR19950034946 A KR 19950034946A KR 970023389 A KR970023389 A KR 970023389A
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- KR
- South Korea
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- semiconductor memory
- memory cell
- placement method
- cell placement
- cell array
- Prior art date
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- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
반도체 메모리 장치에 관한 것으로, 특히 리던던시 중심부(Row Redundancy Cell Array)를 주변회로부와 중심부(Cell Array) 사이에 배치하지 않고 노말 중심부와 노말 중심부 사이에 배치하여 리페처(Repair) 효율을 증가시킬 수 있다.In particular, the present invention relates to a semiconductor memory device. In particular, a redundancy cell array may be disposed between a normal center and a normal center instead of a peripheral circuit and a cell array to increase repair efficiency. .
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제3도는 본 발명에 의한 반도체 메모리 셀 배치 방법에 있어서 로 리던던시 중심부(Row Redundancy Cell Array)의 레이아웃(Layout) 배치도를 나타낸다,3 is a layout diagram of a layout of a low redundancy cell array in the semiconductor memory cell arrangement method according to the present invention.
제4도는 본 발명의 다른 실시예에 의한 반도체 메모리 셀 배치 방법에 있어서 로 리던던시 중심부(Row Redundancy Cell Array)의 레이아웃(Layout) 배치도를 나타낸다.FIG. 4 is a layout diagram of a low redundancy cell array in the semiconductor memory cell arrangement method according to another embodiment of the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034946A KR970023389A (en) | 1995-10-11 | 1995-10-11 | Semiconductor memory cell placement method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034946A KR970023389A (en) | 1995-10-11 | 1995-10-11 | Semiconductor memory cell placement method |
Publications (1)
Publication Number | Publication Date |
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KR970023389A true KR970023389A (en) | 1997-05-30 |
Family
ID=66582570
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950034946A KR970023389A (en) | 1995-10-11 | 1995-10-11 | Semiconductor memory cell placement method |
Country Status (1)
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KR (1) | KR970023389A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990001473A (en) * | 1997-06-16 | 1999-01-15 | 윤종용 | Semiconductor memory device and manufacturing method thereof |
-
1995
- 1995-10-11 KR KR1019950034946A patent/KR970023389A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR19990001473A (en) * | 1997-06-16 | 1999-01-15 | 윤종용 | Semiconductor memory device and manufacturing method thereof |
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WITN | Withdrawal due to no request for examination |