KR970022722A - Video signal interface device of computer and display device - Google Patents
Video signal interface device of computer and display device Download PDFInfo
- Publication number
- KR970022722A KR970022722A KR1019950038511A KR19950038511A KR970022722A KR 970022722 A KR970022722 A KR 970022722A KR 1019950038511 A KR1019950038511 A KR 1019950038511A KR 19950038511 A KR19950038511 A KR 19950038511A KR 970022722 A KR970022722 A KR 970022722A
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- KR
- South Korea
- Prior art keywords
- signal
- clock signal
- computer
- synchronization
- color signals
- Prior art date
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Abstract
본 발명은 컴퓨터에서의 영상 신호를 디스플레이 장치로 볼 수 있도록 변환하도록 한 컴퓨터와 디스플레이 장치의 영상 신호 인터페이스 장치에 관한 것으로, 컴퓨터(100)로부터의 R, G, B 색 신호를 직류 레벨의 변동없이 일정하게 유지시켜서 출력하는 제1버퍼부(210)와 ; 상기 컴퓨터(100)로부터의 제1수평, 수직 동기 신호를 임시 저장하여 출력하는 제2버퍼부(220)와 ; 상기 제2버퍼부(220)로부터의 제1수평, 수직 동기 신호에 기초하여 제1클럭 신호와 상기 제1클럭 신호를 2분주한 제2클럭 신호와, 제1, 2읽기/쓰기 제어 신호, 제2수평, 수직동기 신호를 선택적으로 출력하는 동기 제어부(230)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 의거하여 제1버퍼부(210)로부터의 R, G, B 색 신호를 샘플링하고 소정 비트의 디지탈 색 신호로 변환하여 출력하는 A/D 변환부(240)와 ; 상기 동기 제어부(230)로부터의 제1클럭 신호에 동기되어 제1, 2읽기/쓰기 제어 신호에 의거하여 상기 A/D 변환부(240)로부터의 디지탈 색 신호를 하나의 피일드량만큼 교번하여 저장하고, 상기 동기 제어부(230)로부터의 제2클럭 신호에 동기되어 제1, 2읽기/쓰기 제어 신호에 의거하여 저장된 하나의 피일드양만큼의 디지탈 색 신호를 교번하여 출력하는 제1, 2피일드 메모리부(251, 252)와 ; 상기 제1, 2피일드 메모리부(251, 252)로부터의 디지탈 색 신호를 상기 제2클럭 신호에 의거하여 아날로그 R, G, B 색 신호로 변환하여 출력하는 D/A 변환부(260)를 포함하여, 컴퓨터의 게임 및 입체 영상을 대형 텔레비젼등의 다른 디스플레이 장치로 볼 수 있도록 한 것이다.The present invention relates to a video signal interface device of a computer and a display device for converting a video signal from a computer to be viewed by a display device. The R, G, and B color signals from the computer 100 are changed without changing a DC level. A first buffer portion 210 which is kept constant and outputs; A second buffer unit 220 for temporarily storing and outputting a first horizontal and vertical synchronization signal from the computer 100; A second clock signal obtained by dividing the first clock signal and the first clock signal into two parts based on a first horizontal and vertical synchronization signal from the second buffer unit 220, first and second read / write control signals, A synchronization controller 230 for selectively outputting a second horizontal and vertical synchronization signal; An A / D converter configured to sample R, G, and B color signals from the first buffer unit 210 based on the first clock signal from the synchronization controller 230, and convert the R, G, and B color signals into a predetermined bit of digital color signals 240 and; In synchronization with the first clock signal from the synchronization controller 230, the digital color signal from the A / D converter 240 is alternated by one feed amount based on the first and second read / write control signals. A first and second stored in synchronization with the second clock signal from the synchronization controller 230, and alternately outputting a digital color signal corresponding to one stored amount based on the first and second read / write control signals. Shielded memory sections 251 and 252; The D / A converter 260 converts the digital color signals from the first and second feed memory units 251 and 252 into analog R, G, and B color signals based on the second clock signal. In addition, the game and stereoscopic images of the computer can be viewed on another display device such as a large TV.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명에 따른 인터페이스 장치에 대한 블럭도.1 is a block diagram of an interface device according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950038511A KR970022722A (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950038511A KR970022722A (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and display device |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970022722A true KR970022722A (en) | 1997-05-30 |
Family
ID=66584181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950038511A KR970022722A (en) | 1995-10-31 | 1995-10-31 | Video signal interface device of computer and display device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970022722A (en) |
-
1995
- 1995-10-31 KR KR1019950038511A patent/KR970022722A/en not_active Application Discontinuation
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |