KR970019053A - Page Buffers in Semiconductor Memory Devices - Google Patents
Page Buffers in Semiconductor Memory Devices Download PDFInfo
- Publication number
- KR970019053A KR970019053A KR1019950030027A KR19950030027A KR970019053A KR 970019053 A KR970019053 A KR 970019053A KR 1019950030027 A KR1019950030027 A KR 1019950030027A KR 19950030027 A KR19950030027 A KR 19950030027A KR 970019053 A KR970019053 A KR 970019053A
- Authority
- KR
- South Korea
- Prior art keywords
- node
- current path
- response
- controlling
- semiconductor memory
- Prior art date
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- Static Random-Access Memory (AREA)
Abstract
본 발명은 반도체 메모리 장치에 관한 것으로서, 특히 전원전압과 제 1 노드 사이에 전류통로가 연결되고 래치신호에 응답하여 전류통로를 오/오프제어하는 풀업수단; 제 1 노드와 제 2 노드 사이에 전류통로가 연결되고 제 3 노드에 인가되는 셀데이타에 응답하여 전류통로를 오/오프제어하는 스위칭수단; 제 2 노드에 인가되는 신호를 래치하는 래치수단; 및 제 2 노드와 접지사이에 전류통로가 연결되고 프리세트신호에 응답하여 전류통로를 온/오프제어하는 풀다운수단을 구비한 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device, and more particularly, comprising: pull-up means for connecting a current path between a power supply voltage and a first node, and controlling an on / off current path in response to a latch signal; Switching means for on / off controlling the current path in response to cell data applied between the first node and the second node and applied to the third node; Latch means for latching a signal applied to a second node; And a pull-down means for connecting a current path between the second node and ground and for controlling the current path on / off in response to a preset signal.
따라서, 본 발명에서는 스위칭수단의 게이트 캐패시턴스의 커플링 효과를 제거함으로써 오동작을 방지할 수 있다.Therefore, in the present invention, malfunction can be prevented by eliminating the coupling effect of the gate capacitance of the switching means.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 의한 반도체 메모리 장치의 구성을 나타낸 회로도.1 is a circuit diagram showing a configuration of a semiconductor memory device according to the present invention.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950030027A KR970019053A (en) | 1995-09-14 | 1995-09-14 | Page Buffers in Semiconductor Memory Devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950030027A KR970019053A (en) | 1995-09-14 | 1995-09-14 | Page Buffers in Semiconductor Memory Devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| KR970019053A true KR970019053A (en) | 1997-04-30 |
Family
ID=66615268
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950030027A KR970019053A (en) | 1995-09-14 | 1995-09-14 | Page Buffers in Semiconductor Memory Devices |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR970019053A (en) |
-
1995
- 1995-09-14 KR KR1019950030027A patent/KR970019053A/en not_active Application Discontinuation
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WITN | Withdrawal due to no request for examination |