KR970019019A - Noise filter circuit - Google Patents

Noise filter circuit Download PDF

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Publication number
KR970019019A
KR970019019A KR1019950030477A KR19950030477A KR970019019A KR 970019019 A KR970019019 A KR 970019019A KR 1019950030477 A KR1019950030477 A KR 1019950030477A KR 19950030477 A KR19950030477 A KR 19950030477A KR 970019019 A KR970019019 A KR 970019019A
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KR
South Korea
Prior art keywords
output signal
input terminal
delay
delay means
input
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Application number
KR1019950030477A
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Korean (ko)
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KR0149582B1 (en
Inventor
박재환
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김광호
삼성전자 주식회사
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Priority to KR1019950030477A priority Critical patent/KR0149582B1/en
Publication of KR970019019A publication Critical patent/KR970019019A/en
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Publication of KR0149582B1 publication Critical patent/KR0149582B1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46—Filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

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  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

1. 청구범위에 기재된 발명이 속하는 기술 분야 ;1. The technical field to which the invention described in the claims belongs;

지연로직의 지연간격과 유사한 시간을 가지는 노이즈를 제거하여 정상적인 동작을 보장하기 위한 노이즈 필터에 관한 것이다.The present invention relates to a noise filter for removing noise having a time similar to the delay interval of delay logic to ensure normal operation.

2. 발명이 해결하려고 하는 기술적 과제 ;2. The technical problem to be solved by the invention;

지연로직의 지연간격과 유사한 시간을 가지는 노이즈를 제거하여 정상적인 동작을 보장하기 위한 노이즈 필터를 제공함에 있다.The present invention provides a noise filter to guarantee normal operation by removing noise having a time similar to the delay interval of delay logic.

3. 발명의 해결방법의 요지 ;3. Summary of Solution to Invention;

정상적인 동작시간을 보장하기 위한 노이즈 필터 회로에 있어서, 입력신호를 수신하고 그에따라 발생하는 노이즈를 제거하기 위한 제1,2,3지연수단과, 위상이 동일하며 딜레이가 다른 신호를 수신하기 위하여 제1입력단에는 상기 입력신호를 수신하고, 제2입력단에는 상기 제1지연수단의 출력신호를 제3입력단에는 상기 제2지연수단과 제3지연수단을 통과한 출력신호를 제4입력단에는 상기 제1,2지연수단과 제3지연수단을 통과한 출력신호를 각기 수신하는 사입력 제1게이트수단과, 위상이 동일하며 딜레이가 다른 신호를 수신하기 위하여 제1입력단에는 상기 입력신호를 수신하고 제2입력단에는 상기 제1지연수단의 출력신호를 제3입력단에는 상기 제1,2지연수단을 통과한 출력신호를 제4입력단에는 상기 제1,2,3지연수단을 통과한 출력신호를 각기 수신하는 사입력 제2게이트수단과, 상기 제1게이트수단의 출력신호와 상기 제2게이트수단의 출력신호를 래치시키기 위한 래치부, 상기 래치부의 출력신호를 반전하여 최종출력신호를 출력시키기 위한 인버터를 가지는 것을 요지로 한다.A noise filter circuit for guaranteeing a normal operating time, comprising: first, second, and third delay means for receiving an input signal and removing noise generated therefrom, and for receiving a signal having the same phase and a different delay. The first input terminal receives the input signal, the second input terminal output signal of the first delay means, the third input terminal output signal passing through the second delay means and the third delay means, the fourth input terminal the first signal And a first input first gate means for receiving an output signal passing through the second delay means and the third delay means, and a first input terminal for receiving a signal having the same phase and different delay, and receiving the input signal at a second input terminal. Receiving an output signal of the first delay means to the input terminal, an output signal passing through the first and second delay means to the third input terminal, and an output signal passing through the first, second and third delay means to the fourth input terminal, respectively. Is a four input second gate means, a latch unit for latching an output signal of the first gate means and an output signal of the second gate means, an inverter for inverting an output signal of the latch unit and outputting a final output signal. It is the point to have.

4. 발명의 중요한 용도 ;4. Important uses of the invention;

노이즈 필터에 적합하다.Suitable for noise filter.

Description

노이즈 필터 회로Noise filter circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 따른 다중 지연 통로(multi-delay-path)를 가지는 노이즈 필터 장치의 회로를 보인 도면,3 illustrates a circuit of a noise filter device having a multi-delay-path according to the present invention;

제4도는 제3도에 따른 노이즈의 파형도.4 is a waveform diagram of noise according to FIG.

Claims (4)

정상적인 동작시간을 보장하기 위한 노이즈 필터 회로에 있어서: 입력신호를 수신하고 그에따라 발생하는 노이즈를 제거하기 위한 제1,2,3지연수단과; 위상이 동일하며 딜레이가 다른 신호를 수신하기 위하여 제1입력단에는 상기 입력신호를 수신하고, 제2입력단에는 상기 제1지연수단의 출력신호를 제3입력단에는 상기 제2지연수단과 제3지연수단을 통과한 출력신호를 제4입력단에는 상기 제1,2지연수단과 제3지연수단을 통과한 출력신호를 각기 수신하는 사입력 제1게이트수단과; 위상이 동일하며 딜레이가 다른 신호를 수신하기 위하여 제1입력단에는 상기 입력신호를 수신하고 제2입력단에는 상기 제1지연수단의 출력신호를 제3입력단에는 상기 제1,2지연수단을 통과한 출력신호를 제4입력단에는 상기 제1,2,3지연수단을 통과한 출력신호를 각기 수신하는 사입력 제2게이트수단과; 상기 제1게이트수단의 출력신호와 상기 제2게이트수단의 출력신호를 래치시키기 위한 래치부; 상기 래치부의 출력신호를 반전하여 최종출력신호를 출력시키기 위한 인버터로 이루어지는 것을 특징으로 하는 노이즈 필터 회로.A noise filter circuit for guaranteeing a normal operation time, comprising: first, second, and third delay means for receiving an input signal and removing noise generated therefrom; In order to receive a signal having the same phase and different delay, a first input terminal receives the input signal, a second input terminal output signal of the first delay means, and a third input terminal the second delay means and a third delay means. Four input first gate means for receiving the output signal passed through the fourth input terminal, respectively, the output signal passed through the first and second delay means and the third delay means; In order to receive signals having the same phase and different delays, the first input terminal receives the input signal, the second input terminal outputs the signal of the first delay means, and the third input terminal outputs the first and second delay means. Four input second gate means for receiving a signal at the fourth input stage, respectively, the output signal passing through the first, second, third delay means; A latch unit for latching an output signal of the first gate means and an output signal of the second gate means; And an inverter for outputting the final output signal by inverting the output signal of the latch unit. 제1항에 있어서; 상기 지연수단은 인버터로 이루어짐을 특징으로 하는 노이즈 필터 회로.The method of claim 1; And the delay means comprises an inverter. 제1항에 있어서; 상기 제1게이트수단은 앤드게이트임을 특징으로 하는 노이즈 필터 회로.The method of claim 1; And said first gate means is an end gate. 제1항에 있어서; 상기 제2게이트수단은 노아게이트임을 특징으로 하는 노이즈 필터 회로.The method of claim 1; And said second gate means is a noble gate. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950030477A 1995-09-18 1995-09-18 Noise filter circuit KR0149582B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950030477A KR0149582B1 (en) 1995-09-18 1995-09-18 Noise filter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950030477A KR0149582B1 (en) 1995-09-18 1995-09-18 Noise filter circuit

Publications (2)

Publication Number Publication Date
KR970019019A true KR970019019A (en) 1997-04-30
KR0149582B1 KR0149582B1 (en) 1998-12-15

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Application Number Title Priority Date Filing Date
KR1019950030477A KR0149582B1 (en) 1995-09-18 1995-09-18 Noise filter circuit

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KR0149582B1 (en) 1998-12-15

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