KR970016591A - Synchronous holding range measuring device of phase locked loop (PLL) circuit - Google Patents

Synchronous holding range measuring device of phase locked loop (PLL) circuit Download PDF

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Publication number
KR970016591A
KR970016591A KR1019950029685A KR19950029685A KR970016591A KR 970016591 A KR970016591 A KR 970016591A KR 1019950029685 A KR1019950029685 A KR 1019950029685A KR 19950029685 A KR19950029685 A KR 19950029685A KR 970016591 A KR970016591 A KR 970016591A
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KR
South Korea
Prior art keywords
signal
phase
loop circuit
synchronization
locked loop
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Application number
KR1019950029685A
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Korean (ko)
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KR0183733B1 (en
Inventor
김석범
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김광호
삼성전자 주식회사
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Priority to KR1019950029685A priority Critical patent/KR0183733B1/en
Publication of KR970016591A publication Critical patent/KR970016591A/en
Application granted granted Critical
Publication of KR0183733B1 publication Critical patent/KR0183733B1/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

본 발명은 위상동기루프 회로의 동기유지범위 측정장치에 관한 것으로서, 특히 위상동기루프 회로가 정상적으로 동작하는 입력주파수의 범위를 측정하는 위상동기루프 회로의 동기유지범위 측정장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for measuring a synchronization range of a phase locked loop circuit, and more particularly, to an apparatus for measuring a synchronization range of a phase locked loop circuit for measuring a range of an input frequency in which the phase synchronized loop circuit operates normally.

본 발명에 의한 장치는 위상동기루프 회로로부터 출력되는 신호를 유입하여 동기유지 범위를 벗어난 주파수 성분을 가진 신호성분의 크기를 감쇠시키는 대역통과필터; 대역통과필터로부터 출력되는 신호를 유입하여 피크(Peak)값을 검출하는 피크 검출기(Peak Dectolr); 검출된 피크값과 동기유지범위내의 기준신호값을 비교하여 잠금상태신호를 생성하는 비교기(Comparator); 비교기에서 출력되는 잠금상태신호에 따라서, 위상동기루프 회로로부터 입력되는 신호가 동기유지범위를 벗어나는 경우 위상동기푸프에 이력되는 신호를 스위칭하는 스위치; 및 상기 스위치로부터 유입되는 신호의 주파수를 측정기를 포함한다.The apparatus according to the present invention comprises: a bandpass filter for introducing a signal output from a phase-locked loop circuit to attenuate the magnitude of a signal component having a frequency component outside the synchronization range; A peak detector for detecting a peak value by introducing a signal output from the band pass filter; A comparator for generating a locked state signal by comparing the detected peak value with a reference signal value within the synchronization holding range; A switch for switching a signal stored in the phase synchronizing pouf when the signal input from the phase synchronizing loop circuit is out of the synchronization holding range according to the lock state signal output from the comparator; And a measuring instrument measuring the frequency of the signal flowing from the switch.

Description

위상동기루프(PLL)회로의 동기유지범위 측정장치Synchronous holding range measuring device of phase locked loop (PLL) circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 일반적인 위상동기루프(PLL)회로의 구성도,1 is a configuration diagram of a general phase locked loop (PLL) circuit,

제2도는 본 발명에 따른 위상동기루프(PLL)회로의 동기유지범위 측정장치의 바람직한 실시예를 도시한 블럭도,2 is a block diagram showing a preferred embodiment of a synchronization range measuring apparatus of a phase locked loop (PLL) circuit according to the present invention;

제3A도 및 제3B도는 제2도에 도시한 대역통과필터의 구성도와 주파수 특성도.3A and 3B are a block diagram and a frequency characteristic diagram of the band pass filter shown in FIG.

Claims (1)

위상동기루프 회로로부터 출력되는 신호를 유입하여 동기유지 범위를 벗어난 주파수 성분을 가진 신호성분의 크기를 감쇠시키는 대역통과필터; 상기 대역통과필터로부터 출력되는 신호를 유입하여 피크(Peak)값을 검출하는 피크 검출기(Peak Dectolr); 검출된 피크값과 동기유지범위내의 기준신호값을 비교하여 잠금상태신호를 생성하는 비교기(Comparator); 상기 비교기에서 출력되는 잠금상태신호에 따라서, 위상동기루프 회로로부터 입력되는 신호가 동기유지범위를 벗어나는 경우 위상동기푸프에 입력되는 신호를 스위칭하는 스위치; 및상기 스위치로부터 유입되는 신호의주파수를 측정하는 주파수 측정기를 포함한ㄴ 위상동기루프 회로의 동기유지범위 측정장치.A bandpass filter for introducing a signal output from the phase-locked loop circuit to attenuate the magnitude of a signal component having a frequency component outside the synchronization holding range; A peak detector for detecting a peak value by introducing a signal output from the band pass filter; A comparator for generating a locked state signal by comparing the detected peak value with a reference signal value within the synchronization holding range; A switch for switching the signal input to the phase synchronization pouf when the signal input from the phase synchronization loop circuit is out of the synchronization holding range according to the lock state signal output from the comparator; And a frequency measuring device measuring a frequency of a signal flowing from the switch. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950029685A 1995-09-12 1995-09-12 Apparatus for measuring the range of pll circuit KR0183733B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950029685A KR0183733B1 (en) 1995-09-12 1995-09-12 Apparatus for measuring the range of pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950029685A KR0183733B1 (en) 1995-09-12 1995-09-12 Apparatus for measuring the range of pll circuit

Publications (2)

Publication Number Publication Date
KR970016591A true KR970016591A (en) 1997-04-28
KR0183733B1 KR0183733B1 (en) 1999-04-15

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950029685A KR0183733B1 (en) 1995-09-12 1995-09-12 Apparatus for measuring the range of pll circuit

Country Status (1)

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KR (1) KR0183733B1 (en)

Also Published As

Publication number Publication date
KR0183733B1 (en) 1999-04-15

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