KR970012580A - Regeneration Clock Restoration Device - Google Patents

Regeneration Clock Restoration Device Download PDF

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Publication number
KR970012580A
KR970012580A KR1019950027486A KR19950027486A KR970012580A KR 970012580 A KR970012580 A KR 970012580A KR 1019950027486 A KR1019950027486 A KR 1019950027486A KR 19950027486 A KR19950027486 A KR 19950027486A KR 970012580 A KR970012580 A KR 970012580A
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KR
South Korea
Prior art keywords
signal
equalizer
clock
output
unit
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Application number
KR1019950027486A
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Korean (ko)
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KR100198529B1 (en
Inventor
이상문
Original Assignee
구자홍
Lg 전자주식회사
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Application filed by 구자홍, Lg 전자주식회사 filed Critical 구자홍
Priority to KR1019950027486A priority Critical patent/KR100198529B1/en
Publication of KR970012580A publication Critical patent/KR970012580A/en
Application granted granted Critical
Publication of KR100198529B1 publication Critical patent/KR100198529B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10018—Improvement or modification of read or write signals analog processing for digital recording or reproduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/10009—Improvement or modification of read or write signals
    • G11B20/10268—Improvement or modification of read or write signals bit detection or demodulation methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel

Abstract

본 발명은 재생클럭 복원장치에 관한 것으로서, 다중기록 모드시 단일시스템에서 각각의 기록모드에 해당하는 재생클럭을 발생하므로써 하드웨어의 구성을 간략화하고 이로인해 코스트를 절감시키는데 적당한 재생클럭 복원장치를 제공하기 위한 것이다.The present invention relates to a playback clock restoration apparatus, which provides a playback clock restoration apparatus suitable for simplifying the configuration of hardware and thereby reducing the cost by generating a playback clock corresponding to each recording mode in a single system in a multiple recording mode. It is for.

이를 위한 재생클럭 복원장치는 재생증폭된 신호의 왜곡을 보상하는 제1등화기와, 상기 제1등화기의 출력을 적분한후 기준전압과 비교하는 적분 및 제1비교부와, 상기 제1등화기의 출력신호에서 클럭성분을 추출하는 클럭성분 추출부와, 상기 제1등화기의 출력신호를 입력으로 하여 하기의 PLL부의 중심주파수를 자동적으로 제어하기 위한 제어신호를 출력하는 자동중심 주파수 조정부와, 상기 자동중심 주파수 조정부의 제어신호에 따라 기록모드에 해당하는 클럭신호를 출력하는 PLL 부와, 상기 적분 및 제1비교부의 출력데이터를 상기 PLL부의 클럭신호에 의해 복원하여 출력하는 데이터 변별기를 포함하여 구성됨을 특징으로 한다.The regeneration clock recovery apparatus for this purpose includes a first equalizer for compensating for distortion of a regenerated amplified signal, an integrator and a first comparator for integrating the output of the first equalizer with a reference voltage, and the first equalizer. A clock component extracting unit for extracting a clock component from an output signal of the first signal, an automatic center frequency adjusting unit for outputting a control signal for automatically controlling the center frequency of the following PLL unit as an input signal of the first equalizer; A PLL unit for outputting a clock signal corresponding to a recording mode according to a control signal of the automatic center frequency adjusting unit, and a data discriminator for restoring and outputting the output data of the integral and first comparators by the clock signal of the PLL unit; Characterized in that configured.

Description

재생클럭 복원장치Regeneration Clock Restoration Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 재생클럭 복원장치의 구성블럭도,2 is a block diagram of the recovery clock recovery apparatus of the present invention,

제3도는 본 발명에 따른 클럭성분 추출부의 각부 파형도,3 is a waveform diagram of each part of the clock component extracting unit according to the present invention;

제4도는 인가전압에 따른 전압제어 발신기의 전달특성을 나타낸 그래프.4 is a graph showing the transfer characteristics of the voltage-controlled transmitter according to the applied voltage.

Claims (4)

재생증폭된 신호의 왜곡을 보상하는 제1등화기와, 상기 제1등화기의 출력을 적분한후 기준전압과 비교하는 적분 및 제1비교부와, 상기 제1등화기의 출력신호에서 클럭성분을 추출하는 클럭성분 추출부와, 상기 제1등화기의 출력신호를 입력으로 하여 하기의 PLL부의 중심주파수를 자동적으로 제어하기 위한 제어신호를 출력하는 자동중심 주파수 조정부와, 상기 자동중심 주파수 조정부의 제어신호에 따라 기록모드에 해당하는 클럭신호를 출력하는 PLL 부와, 상기 적분 및 제1비교부의 출력데이터를 상기 PLL부의 클럭신호에 의해 복원하여 출력하는 데이터 변별기를 포함하여 구성됨을 특징으로 하는 재생클럭 복원장치.A first equalizer for compensating for distortion of the reproduced amplified signal, an integrating and first comparing unit for integrating the output of the first equalizer with a reference voltage, and a clock component in an output signal of the first equalizer; An automatic center frequency adjusting unit for extracting a clock component extracting unit, an output signal of the first equalizer and outputting a control signal for automatically controlling the center frequency of the following PLL unit, and controlling the automatic center frequency adjusting unit; And a PLL section for outputting a clock signal corresponding to a recording mode according to the signal, and a data discriminator for restoring and outputting the output data of the integral and first comparators by the clock signal of the PLL section. Restoration device. 제1항에 있어서, 상기 클럭성분 추출부는 제1등화기의 출력신호를 전파정류하는 전파정류기와, 상기 전파정류기의 출력신호와 기설정된 기준전압과 비교하는 비교기를 포함하여 구성됨을 특징으로 하는 재생클럭 복원장치.The reproducing apparatus according to claim 1, wherein the clock component extracting unit comprises a full-wave rectifier for full-wave rectifying the output signal of the first equalizer and a comparator for comparing the output signal of the full-wave rectifier with a preset reference voltage. Clock recovery device. 제1항에 있어서, 상기 자동중심 주파수 조정부는 제1등화기의 출력신호를 미분하는 미분기와, 상기 미분기의 출력신호에서 제로크로싱 포인트를 검출하는 제로크로싱 검출기와, 상기 제로크로싱 포인트간의 시간간격중 최소구간을 측정하는 최소구간 측정부와, 상기 최소구간 측정부에 의해 출력된 최소구간에 해당하는 시간간격을 전압으로 변환하여 출력하는 시간/전압 변환부를 포함하여 구성됨을 특징으로 하는 재생클럭 복원장치.2. The apparatus of claim 1, wherein the automatic center frequency adjusting unit is configured to differentiate between an output signal of the first equalizer, a zero crossing detector for detecting a zero crossing point in the output signal of the differentiator, and a time interval between the zero crossing points. Regeneration clock recovery device characterized in that it comprises a minimum section measuring unit for measuring the minimum section, and a time / voltage converter for converting the time interval corresponding to the minimum section output by the minimum section measuring unit to output the voltage. . 제1항에 있어서, 상기 데이터 변별기로 입력되는 신호는 제1등화기의 출력신호가 검출경로를 통해 제2등화기에서 적분되어 기설정된 기준전압과 비교하는 제1비교기의 출력신호임을 특징으로 하는 재생클럭 복원장치.The signal of claim 1, wherein the signal input to the data discriminator is an output signal of the first comparator comparing the output signal of the first equalizer with the preset reference voltage by being integrated in the second equalizer through the detection path. Regeneration Clock Restoration Device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950027486A 1995-08-30 1995-08-30 Device for recovering reproduction clock of multiplexed recording mode KR100198529B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950027486A KR100198529B1 (en) 1995-08-30 1995-08-30 Device for recovering reproduction clock of multiplexed recording mode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950027486A KR100198529B1 (en) 1995-08-30 1995-08-30 Device for recovering reproduction clock of multiplexed recording mode

Publications (2)

Publication Number Publication Date
KR970012580A true KR970012580A (en) 1997-03-29
KR100198529B1 KR100198529B1 (en) 1999-06-15

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KR1019950027486A KR100198529B1 (en) 1995-08-30 1995-08-30 Device for recovering reproduction clock of multiplexed recording mode

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KR100198529B1 (en) 1999-06-15

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