KR970009045A

KR970009045A - Cell Flow Control Device in Output Buffer Type ATM Switch

Info

Publication number: KR970009045A
Application number: KR1019950021670A
Authority: KR
Inventors: 김근배; 오진태; 김협종
Original assignee: 양승택; 한국전자통신연구소; 이준; 한국전기통신공사
Priority date: 1995-07-21
Filing date: 1995-07-21
Publication date: 1997-02-24

Abstract

본 발명은 출력 버퍼 형태의 ATM 스위치에서 출력 버퍼의 혼합상태에 따라 셀의 흐름을 제어하는 셀 흐름 제어 장치에 관한 것으로, 출력 버퍼형 ATM 스위치의 출력 버퍼 상태에 따라 발생하는 작은 수의 신호선으로 구성된 역방향 셀 흐름 제어 신호를 이용하여 공유 메모리에서 스위치 네트워크로의 셀 송출을 효과적으로 제어하는 출력 버퍼형 ATM 스위치에서의 셀 흐름 제어 장치를 제공하기 위하여, 셀을 입력받아 출력지 주소정보를 분리하는 주소 분리 수단(5); 셀을 저장하는 공유 메모리(6); 쓰기 주소 정보와 카운터 증가 트리거를 출력하는 쓰기 주소 제어 수단(10); 셀의 저장 정도를 나타내는 셀 유무 정보를 출력하는 셀 저장 카운팅 수단(14); 역방향 흐름 제어 신호를 입력받아 송출가능한 출력지 주소를 결정하는 중재수단(13); 읽기 주소 정보를 출력하는 읽기 주소 제어 수단(12); 셀의 저장 위치 정보를 저장하는 셀 단위 주소 메모리(11); 제어 신호에 따라 가용 주소지 정보를 출력하는 선입 선출 수단(9); 입력셀의 구성 바이트 수 만큼을 카운팅하는 쓰기 주소 카운팅 수단(7); 및 주소 정보를 시작점으로 하여 셀의 구성 바이트 수 만큼을 카운팅하는 읽기 주소 카운팅 수단(8)을 구비하여 셀 손실을 최소화 할 수 있는 효과가 있다.The present invention relates to a cell flow control device for controlling the flow of cells in accordance with the mixed state of the output buffer in the ATM switch of the output buffer type, consisting of a small number of signal lines generated according to the output buffer state of the output buffer type ATM switch In order to provide a cell flow control device in an output buffer type ATM switch that effectively controls cell transmission from a shared memory to a switch network using a reverse cell flow control signal, an address separation that separates output address information from a cell input. Means (5); Shared memory 6 for storing cells; Write address control means (10) for outputting write address information and a counter increment trigger; Cell storage counting means (14) for outputting cell presence information indicating the storage degree of the cell; Arbitration means (13) for receiving a reverse flow control signal to determine an output address which can be sent; Read address control means 12 for outputting read address information; A cell unit address memory 11 for storing storage location information of the cell; First-in, first-out means 9 for outputting available address information in accordance with the control signal; Write address counting means 7 for counting the number of constituent bytes of the input cell; And a read address counting means 8 that counts the number of bytes of the cell by using the address information as a starting point, thereby minimizing cell loss.

Description

Cell Flow Control Device in Output Buffer Type ATM Switch

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 셀 흐름 제어 장치의 구성도, 제3도는 본 발명에 따른 타이밍도.2 is a configuration diagram of a cell flow control apparatus according to the present invention, Figure 3 is a timing diagram according to the present invention.

Claims

Address separation means (5) for receiving a cell from an external source and separating output address information to output first output location selection information, a cell, and a control signal; A shared memory (6) which receives a cell from the output address separating means (5) and stores the cell until it is sent out; Write address control means (10) for receiving first output destination selection information from the output address separation means (5) and outputting write address information and a counter increment trigger; Cell storage counting means (14) for receiving a counter increment trigger from the write address control means (10) and receiving a counter decrement trigger and outputting cell presence information indicating a storage degree of the cell; Mediation means (13) for receiving cell presence information from the cell storage counting means (14), receiving a reverse flow control signal from an external device, determining an output address that can be transmitted, and outputting second output destination selection information and a control signal; Read address control means (12) for receiving second output destination selection information from the arbitration means (13) and outputting read address information; Receives available address information, receives write address from the write address control means 10, receives read address from the read address control means 12, stores storage location information of the cell, and addresses information according to the storage location of the cell. A cell unit address memory 11 for outputting a; First-in, first-out that receives address information from the cell unit address memory 11 and outputs available address information to the cell unit address memory 11 according to control signals from the address separating means 5 and the arbitration means 13. Means 9; Write address counting means (7) for counting the number of configuration bytes of the input cells according to the available address information from the first-in-first-out means (9) and providing the write address information of the input cells to the shared memory (6); And receiving the cell storage position information in the shared memory 6 from the cell address memory 11 and counting the number of bytes of the cell in the shared memory 6 based on the address information as a starting point. And a read address counting means (8) for providing said shared memory (6) to said shared memory (6).

The method of claim 1, wherein the reverse flow control signal is configured to allocate the state of each output buffer bit by bit in order to provide the congestion state of an external output buffer to the arbitration means 13 using a minimum signal line. Cell flow control device in an output buffer type ATM switch.

※ Note: The disclosure is based on the initial application.