KR970006530B1 - Diode lead pin - Google Patents
Diode lead pin Download PDFInfo
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- KR970006530B1 KR970006530B1 KR1019930001247A KR930001247A KR970006530B1 KR 970006530 B1 KR970006530 B1 KR 970006530B1 KR 1019930001247 A KR1019930001247 A KR 1019930001247A KR 930001247 A KR930001247 A KR 930001247A KR 970006530 B1 KR970006530 B1 KR 970006530B1
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- solder piece
- header surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Die Bonding (AREA)
Abstract
내용없음.None.
Description
제1도는 본 발명의 1실시예인 리이드핀의 사용상태를 표시하는 다이오우드의 단면도.1 is a cross-sectional view of a diode showing the state of use of the lead pin of an embodiment of the present invention.
제2도는 리이드핀과 납땜편을 표시하는 사시도.2 is a perspective view showing a lead pin and a solder piece.
제3도는 리이드핀의 일부단면도.3 is a partial cross-sectional view of the lead pin.
제4도는 본 발명의 다른 실시예인 리이드핀의 일부단면도.4 is a partial cross-sectional view of a lead pin of another embodiment of the present invention.
제5도는 더욱 다른 실시예인 리이드핀의 일부단면도.5 is a partial cross-sectional view of a lead pin in yet another embodiment.
제6도는 본 실시예인 리이드핀의 제조장치의 설명도.6 is an explanatory diagram of an apparatus for manufacturing a lead pin according to the present embodiment.
제7도는 제조장치에 구비하는 납땜편의 부착장치의 설명도.7 is an explanatory diagram of a soldering piece attachment device included in the manufacturing apparatus.
제8도는 제6도의 장치에 사용하는 금형펀치의 1예를 표시하는 사시도이다.8 is a perspective view showing an example of a mold punch used in the apparatus of FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 리이드핀 3 : 납땜편1: Lead pin 3: Solder piece
5 : 두부 5b : 헤더면5: tofu 5b: header surface
6 : 돌기 7 : 오목부6: protrusion 7: recess
9 : 환형상의 돌조9: annular stone
본 발명은 다이오우드에 부착되는 리이드단자인 리이드핀 및 그 제조방법에 관한 것이다. 다이오우드의 일반적인 구조 및 제조방법은 한쌍의 리이드핀과 반도체 소자를 납땜으로 접합하고, 그후, 수지등의 봉지재로 반도체 소자 및 접합부를 피복하고 있었다.The present invention relates to a lead pin which is a lead terminal attached to the diode and a manufacturing method thereof. In general, the structure and manufacturing method of a diode were a pair of lead pins and a semiconductor element joined by soldering, and then the semiconductor element and the junction were covered with a sealing material such as resin.
상기한 리이드핀에는 선재의 한쪽끝에 납땜을 부착시키는 평평한 두부(頭部)가 형성되고, 이 리이드핀의 두부에는 다이오우드의 조립체에 미리 납이 가열되어 점(点)이 부착되어 있다.The lead pin is formed with a flat head for attaching soldering to one end of the wire rod, and lead is heated on the lead of the diode in advance, and a dot is attached to the lead pin.
또 상기한 두부의 성형가공에는 펀치금형이 사용되고, 리이드선의 재료 선단을 긴쪽방향에서 찌부러뜨러 냉간압조하므로서 평평한 두부가 형성된다. 그 압조단면을 헤더면으로 칭하고, 종래, 이 헤더면은 납땜편을 용접하기 쉽게하기 위하여 균일한 평면으로 형성되어 있었다.In addition, a punch mold is used for the molding process of the head, and the flat head is formed by cold pressing the material tip of the lead wire in the longitudinal direction. The pressure cross section is referred to as a header surface. In the past, this header surface was formed in a uniform plane to facilitate welding of the solder piece.
상기한 종래의 기술을 미리 헤더면에 납땜재를 부착하는 작업은, 헤더면에 납땜재를 위치시켜 놓은다음, 그 일부를 용융한다고 하는 미세한 가열작업이므로 자동화가 곤란하고, 일손에 의하여 그 작업이 이루어지며 비능률적인 것이었다.The prior art of attaching the brazing material to the header surface is difficult to automate because it is a fine heating operation that places the brazing material on the header surface and then melts a part thereof. It was done and inefficient.
따라서, 다이오우드의 높은 코스트를 초래하고, 게다가 용접불량등이 원인으로 제조상의 수율이 나쁜것등, 많은 문제를 떠맡고 있었다.Therefore, many problems were incurred, such as a high cost of a diode and a bad manufacturing yield due to welding defects.
본 발명에서는 상기한 종래기술의 문제점에 감안하여 이루어진 것으로서, 헤더면에 납땜면을 부착할 때에 가열하지 않고, 간단한 가공에 의하여 결합할 수 있는 다이오우드용 리이드핀 및 그 제조방법을 제공하는 것을 목적으로 한다.The present invention has been made in view of the above-described problems of the prior art, and an object thereof is to provide a lead pin for a diode that can be joined by a simple process without heating when attaching a solder surface to a header surface, and a manufacturing method thereof. do.
본 발명은 리이드핀의 두부에 형성된 헤더면을, 납땜편을 가압변형에 의하여 결합시킬 수 있는 요철형상으로 형성된 다이오우드용 리이드핀이다. 더욱 본 발명은 리이드핀의 헤더면 주변에 환형상의 돌조를 설치하고, 이 환형상의 돌조 내측에 있어서, 헤더면을 요철형상으로 형성한 다이오우드용 리이드핀이다.The present invention is a lead pin for a diode formed in a concave-convex shape in which the header surface formed on the head of the lead pin can be bonded to the solder piece by pressure deformation. Furthermore, this invention is the lead pin for diodes which provided the annular protrusion around the header surface of the lead pin, and formed the header surface in the uneven shape inside this annular protrusion.
이 요철형상은 복수의 돌기 또는 오목한 부분에서 이루어진다. 또 본 발명은 리이드핀의 선재료의 선단으로 긴쪽방향에 대하여 직교하는 면을 보유한 두부를 형성할때에, 펀치 금형의 단면형상이 요철형상인 것을 사용하여 헤드면을 요철형상으로 형성하고, 이 요철형상인 헤더면에 납땜편을 공급하고, 가압에 의한 요철부의 변형에 의하여 헤더면과 납땜편을 결합시키는 다이오우드용 리이드핀의 제조방법이다.This uneven shape is formed in a plurality of projections or concave portions. In the present invention, when forming the head having the surface orthogonal to the longitudinal direction at the tip of the wire material of the lead pin, the head surface is formed into the uneven shape by using the cross-sectional shape of the punch mold having the uneven shape. It is a manufacturing method of the lead pin for diodes which supplies a solder piece to the uneven | corrugated header surface, and couple | bonds a header surface and a solder piece by deformation of the uneven | corrugated part by pressurization.
본 발명의 다이오우드 리이드핀 및 그 제조방법은 헤더면에 납땜편을 대교 가압하므로서, 그 납땜편이 헤더면의 요철부로 파고들어가 결합하는 것이다.The diode lead pin of the present invention and the manufacturing method thereof press the solder piece against the header face, so that the solder piece penetrates into the uneven portion of the header face and joins.
또, 헤더면에 환형상의 돌조를 설치하고, 그것에 의하여 납땜편이 비어져나오거나, 탈락하지 않도록 보호된다. 또, 본 발명의 다이오우드용 리이드핀의 제조방법에 의하면, 헤더가공이 종료됨과 동시에, 헤더면에 납땜편을 공급하여 부착시킬 수 있고, 납땜편 부착작업의 자동화가 쉽게 된다.In addition, an annular protrusion is provided on the header surface, whereby the solder piece is protected from protruding or falling off. In addition, according to the manufacturing method of the lead pin for diodes of the present invention, at the same time as the header processing is completed, the solder piece can be supplied and attached to the header surface, thereby facilitating the automation of the solder piece attaching operation.
이하, 본 발명의 실시예를 도면에 의거하여 설명한다. 제2도 및 제3도는 제1도에 표시하는 다이오우드에 사용되는 리이드핀(1)을 표시한다. 이 리이드핀(1)의 선재료(10)는 보통은 클래드동선이나 니켈도금동선이 사용되어 있다.EMBODIMENT OF THE INVENTION Hereinafter, the Example of this invention is described based on drawing. 2 and 3 show the lead pins 1 used in the diode shown in FIG. As the wire material 10 of the lead pin 1, a clad copper wire and a nickel plated copper wire are usually used.
이 선재료(10)를 가공하여 선단으로 원형의 두부(5)가 형성되고, 그 두부(5)의 납땜편의 부착측의 면인 헤더면(5b)에는 주변부에 환형상의 돌조(9)가 설치되고, 그 내측으로 다수의 돌기(6)가 형성되어 있다.The wire material 10 is processed to form a circular head 5 at the tip, and an annular protrusion 9 is provided on the periphery of the header surface 5b, which is the surface on the attachment side of the solder piece of the head 5. Many protrusions 6 are formed inwardly thereof.
그리고, 환형상이 돌조(9)에 납땜편(3)이 끼어진 상태에 있어서, 납땜편(3)에 헤더면(5b)의 돌기(6)가 가압되어 침입한다. 또, 본 발명의 다이오우드용 리이드핀의 다른 실시예로서, 제4도에 표시하듯이, 돌기를 제거한 두부(5)의 헤더면(5b)의 주연부에, 환형상인 돌조(9)를 형성하고, 그 중에 납땜편(3)을 감합하고, 코오킹 하도록 하여 양자를 결합시킬 수도 있다.And in the state in which the solder piece 3 was pinched in the annular protrusion 9, the projection 6 of the header surface 5b is pressed in by the solder piece 3, and it intrudes. As another embodiment of the lead pin for diodes of the present invention, as shown in FIG. 4, an annular protrusion 9 is formed at the periphery of the header surface 5b of the head 5 from which the protrusion is removed, The solder piece 3 may be fitted and coked so that both may be combined.
따라서, 환형상의 돌조(9)도 요철형상인 하나의 상태이다. 또, 제5도에 표시하듯이, 돌기(6) 대신에 오목부(9)를 헤더면(5b)에 설치하여도 좋다.Therefore, the annular protrusion 9 is also in one uneven state. In addition, as shown in FIG. 5, the recessed part 9 may be provided in the header surface 5b instead of the projection 6. As shown in FIG.
제6도 및 제7도는, 납땜편이 부착된 리이드핀의 제조장치를 표시하고, 납땜편(3)의 부착장치를 겸한 가공 장치이다.6 and 7 show a manufacturing apparatus for a lead pin with a solder piece attached, and is a processing device that also serves as an attachment device for the solder piece 3.
이 장치는, 리이드선재료(10)를 슬라이드그리퍼(12)로 그립(grib)하고, 리이드핀(1)의 길이에 대응한 소정길이를 슬라이드시켜, 클램프다이스(14)에 의하여 그립한다.This apparatus grips the lead wire material 10 with the slide gripper 12, slides the predetermined length corresponding to the length of the lead pin 1, and grips it with the clamp die 14. As shown in FIG.
그 상태에 있어서 펀치금형(15)로 선재료(10)의 선단부를 부수고 두부(5)를 형성하며, 그후 커터(13)에 의하여 선재료(10)를 절단하고, 핸드식 반송장치(16)에 의하여 납땜편을 집어넣는 장치의 크램퍼(17)로 그립한다. 이때에 공급되는 리이드핀(1)의 선재료(10)에는, 선경이 0.61mm의 니켈도금동선이 사용되고, 두부형성가공에 의하여 전장 31mm, 두부(5)의 지름이 1.55mm의 리이드핀(1)이 형성된다.In this state, the punch mold 15 breaks the tip end portion of the wire material 10 to form the head 5, and thereafter, the wire material 10 is cut by the cutter 13, and the hand transfer device 16 is used. Is gripped by the clamper 17 of the device in which the solder piece is inserted. At this time, a nickel plated copper wire having a diameter of 0.61 mm is used for the wire material 10 of the lead pin 1 supplied, and a lead pin 1 having a length of 31 mm and a head diameter of 1.55 mm is formed by the head forming process. ) Is formed.
이 두부형성가공이 끝남과 동시에, 그 헤더면(5b)에 납땜편(3)이 결합된다. 납땜편(3)은 납땜편가이드(19)로 1개씩 공급되고, 납땜을 집어넣는 펀치(20)로 리이드핀(1)의 두부(5)에 집어넣어져서 압접된다. 이후 크램퍼(17)를 펼치고 리이드핀(1)을 배출한다.At the same time as this head forming process is completed, the solder piece 3 is bonded to the header surface 5b. The solder pieces 3 are supplied one by one to the solder piece guide 19, and are pressed into the head 5 of the lead pin 1 by a punch 20 for inserting the solder. Thereafter, the clamper 17 is extended and the lead pin 1 is discharged.
리이드핀(1)의 헤더편(5b)은 펀치(15)의 형상에 의하여, 상기한 바와 같이 요철로 형성된다.The header piece 5b of the lead pin 1 is formed by the unevenness | corrugation as mentioned above by the shape of the punch 15. As shown in FIG.
그 요철형상는 납땜편(3)을 일정량 균일하게 과열하지 않고 부착시킬 수 있으며, 리이드핀(1)의 운반중이나 제조도중에서 납땜편(3)이 벗겨지는 일이 없도록 설정된다.The concave-convex shape can attach the solder piece 3 without uniformly overheating a certain amount, and is set so that the solder piece 3 does not come off during the transport of the lead pin 1 or during manufacture.
이 실시예의 다이오우드용 리이드핀에 의하면, 선재료(10)에서 헤더가공을 할때에, 헤더가공과 납땜편의 결합을 동시에 실시한 경우에는 납땜이 극단으로 유연하므로 헤더가공에 필요한 가압력으로 납땜편(3)을 집어넣으면, 헤더면(5b)이 평평한 경우 납땜이 주위로비산되고, 납땜을 일정량 균일하게 부착시킬 수 없다고 하는 일이 있었지만, 헤더면(5b)을 요철형상으로 형성하므로서 이 비산은 방지되었다.According to the diode lead pin of this embodiment, when the header processing is performed in the wire material 10, when the header processing and the soldering piece are combined at the same time, soldering is extremely flexible. ), Soldering is scattered around when the header surface 5b is flat, and soldering cannot be uniformly fixed, but this scattering is prevented by forming the header surface 5b into an uneven shape. .
특히, 환형상의 돌조(9)를 설치한 경우에는, 그것이 납땜(3)을 보호하므로 돌기(6)의 사이로 압축되고, 그 반작용으로 돌기(6)의 측면에도 납땜편(3)이 압접하므로 결합력이 대폭 향상된다.In particular, in the case where the annular protrusion 9 is provided, it protects the solder 3, so that it is compressed between the protrusions 6, and the soldering piece 3 is pressed against the side surface of the protrusion 6 by the reaction, so that the bonding force is achieved. This is greatly improved.
환형상이 돌조(9)와 돌기(6)에 의하여 납땜보호, 비어져나옴 및 비산방지효과가 얻어지도록, 니켈도금동선과 같이, 납땜과의 부착력이 거의 없는 재료라도 확실하게 납땜편(3)을 부착시킬 수 있다.In order to obtain the effect of soldering protection, protruding and scattering prevention by the projections 9 and the projections 6, the soldering piece 3 can be reliably secured even if the material has little adhesion to the solder, such as a nickel-plated copper wire. Can be attached.
본 발명의 리이드핀에 의하면, 헤더면을 요철형상으로 형성하므로서 가열장치에 의하지 않고, 가압이라고 하는 간단한 작업에 의하여, 헤더에 납땜편을 결합시킬 수 있다.According to the lead pin of this invention, a solder piece can be bonded to a header by the simple operation of pressurization, without forming a header surface by an uneven | corrugated shape.
따라서, 납땜편의 부착작업이 대단히 능률적이며 자동화도 가능하게 되고, 다이오우의 값싼 제공에 기여한다.Therefore, the attaching work of the solder piece is very efficient and automation is possible, contributing to the cheap provision of the die.
특히, 헤더면에 환형상돌조를 설치한 경우에는 납땜편의 비어져나옴이나 탈락이 방지되고, 또 환형상돌조와 돌기 또는 오목부를 함께 설치한 경우에는, 리이드핀의 재질여하에 불구하고, 납땜편의 안정된 부착상태가 얻어지므로 다이오우드의 수율이 양호하게 되고, 품질도 안정시킬 수 있다.In particular, when an annular protrusion is provided on the header surface, protruding or dropping of the solder piece is prevented, and when the annular protrusion, protrusion or recess is provided together, the solder piece is stable despite the material of the lead pin. Since the adhered state is obtained, the yield of the diode is good and the quality can be stabilized.
또, 본 발명의 리이드핀의 제조방법에 의하면, 일련의 장치에 의하여 납땜편이 부착된 리이드핀을 제조할 수 있고, 더우기 그 작업능률을 높일 수 있다.Moreover, according to the manufacturing method of the lead pin of this invention, the lead pin with a solder piece can be manufactured by a series of apparatus, Furthermore, the working efficiency can be improved.
Claims (6)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4091766A JPH0812891B2 (en) | 1992-03-17 | 1992-03-17 | Lead pin for diode with solder piece and manufacturing method thereof |
| JP92-91766 | 1992-03-17 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930020750A KR930020750A (en) | 1993-10-20 |
| KR970006530B1 true KR970006530B1 (en) | 1997-04-29 |
Family
ID=14035686
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019930001247A KR970006530B1 (en) | 1992-03-17 | 1993-01-30 | Diode lead pin |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPH0812891B2 (en) |
| KR (1) | KR970006530B1 (en) |
| TW (1) | TW234779B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002198479A (en) * | 2000-12-27 | 2002-07-12 | Nippon Inter Electronics Corp | Axial lead type semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS555721A (en) * | 1978-06-27 | 1980-01-16 | Kawasaki Steel Corp | Detecting method for clogging of nozzle |
-
1992
- 1992-03-17 JP JP4091766A patent/JPH0812891B2/en not_active Expired - Fee Related
- 1992-11-26 TW TW081109479A patent/TW234779B/zh active
-
1993
- 1993-01-30 KR KR1019930001247A patent/KR970006530B1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| KR930020750A (en) | 1993-10-20 |
| TW234779B (en) | 1994-11-21 |
| JPH05267516A (en) | 1993-10-15 |
| JPH0812891B2 (en) | 1996-02-07 |
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