KR970004257B1 - Dual control method for multi-fault systems - Google Patents

Abstract

Disclosed is a duplication control circuit in a various fault generating system. The circuit comprises a general fault count controller(1), a main fault searcher(2), a fault searcher(3), a switching request flag generator(4), an active/standby determiner(5). The general fault count controller(1) counts the general faults and outputs a fault signal. The main fault searcher(2) searches main faults. The fault searcher(3) searches fault generating including general and main faults, and generates a fault signal. The switching request flag generator(4) generates the switching request flag according to outputs from the general fault count controller(1) and main fault searcher(2). The active/standby determiner(5) determines whether the state is active or standby according to the output of the switching request flag generator(4) and corresponding duplication controller. Thereby, the duplication is controlled according to the grade of generated fault, so that switching between active state and standby state is reliably performed.

Description

Redundancy Control Circuit of Multiple Fault Generation Systems

1 is a system configuration diagram showing a redundant control portion of a conventional multi-fault generation system to which the present invention is applied.

2 is a circuit diagram showing a redundancy control circuit according to the present invention.

3 is a timing diagram of the timer unit in FIG.

* Description of the symbols for the main parts of the drawings *

1: General fault count control unit 2: Main fault search unit

3: Fault search unit 4: Conversion request flag generation unit

5: active / standby determining unit 11: timer

12: general fault search unit 13: latch unit

14, 16: gate 15: general fault counter

The present invention relates to a fault generating system, and more particularly, to a redundancy control circuit suitable for a redundant system in which various kinds of fault sources exist.

The redundancy structure can be largely classified into a hardware redundancy structure and a software redundancy structure. Here, in the redundant structure by software, the fault is searched by the processor, and when the fault is found, the redundancy control is executed by the fault process by the processor. Therefore, since the processing time is required after the fault is detected by the processor until the active / standby switchover occurs, the processing fat of the system is lowered, and the redundant control is paralyzed when the processor malfunctions. There is a problem that will have a fatal adverse effect.

On the other hand, in the redundancy structure by hardware, the generated fault is searched, and when a fault is found, the redundancy is directly controlled according to the found fault. Therefore, in the redundancy structure by this hardware, unlike the duplication structure by the said software, the redundancy control process has an advantage. However, there is a problem in the redundant structure by this hardware that a fault is detected in a state in which a plurality of faults are not distinguished. That is, since the same redundancy processing is performed for multiple faults without performing redundancy processing according to the degree of fault, it is suitable for redundancy control for critical faults, while recovering normal faults. When this occurs, there is a problem in that unnecessary active / standby switching is performed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and an object thereof is to provide a redundancy control circuit capable of improving the reliability of active / standby switching in a redundant structure by hardware.

The redundant control circuit according to the present invention for achieving the above object, the general fault count control unit 1 for counting the general fault according to the timer clock signal and outputting the fault signal, and the main fault search unit 2 for searching the main fault. And a fault search unit (3) for generating fault signals by searching for fault occurrences including general faults and major faults, and output signals from the general fault count control unit (1) and the major fault search unit (2). On the basis of the switching request flag generating section 4 which generates the switching request flag, the output signal from the switching request flag generating section 4 and the active / fault signal BACT * / BFAULT * from the counterpart redundant control section. And an active / standby determination section 5 for determining the active / standby state.

According to the present invention having the above-described configuration, since the redundancy process is controlled according to the degree of fault generated, it is possible to reliably perform active / standby switching of the redundant structure by hardware.

Hereinafter, one embodiment of a redundant control circuit of a multiple fault system according to the present invention will be described with reference to the exemplary drawings.

1 is a system configuration diagram showing a redundancy control part of a multi-fault generation system to which the present invention is applied. The redundancy base parts A and B on the A side and the B side are respectively provided with an active signal AACT *. Or BACT *) and a fault signal (AFULT * or BFAULT *).

In addition, since the said redundancy control part (A) (B) has the same structure mutually, in the following description, only the thing about the redundancy control part A of the A side is demonstrated.

2 is a block diagram showing a redundancy control circuit according to the present invention, which includes a general fault count control unit 1 for counting a general fault and outputting a fault signal according to a timer clock signal, and a main fault search unit for searching for a major fault ( 2), a fault searching unit 3 for searching for fault occurrences including a general fault and a major fault and generating a fault signal, and an output signal from the general fault count control unit 1 and the main fault search unit 2; A switching request flag generating section 4 for generating a switching request flag on the basis of the < RTI ID = 0.0 > and / or < / RTI > It is configured to include.

Further, as shown in the timing diagram in FIG. 3, the general fault count control unit 1 includes T1 for periodically searching for a general fault, T2 for clearing a general fault, T3 for periodically counting a general fault, and A general fault search for searching for a general fault that does not require immediate active / standby switching according to the T1 signal from the timer 11, and a timer 11 for generating a timing signal of T4 for periodically clearing the general fault. A latch unit composed of, for example, a D flip-flop that latches the general fault from the general fault search unit 12 and clears the latched general fault in accordance with the T2 signal from the timer 11. (13), a gate portion (14) composed of an AND gate for outputting data latched to the latch portion (13) in accordance with the T3 signal from the timer (11), and outputted from the gate portion (14). A general fault counter 15 that counts a general fault by counting a data signal, and the general fault count 15 based on a T4 signal from the timer 11 and a flag signal from the switch request flag generator 4. And a gate portion 16 composed of an AND gate for setting the count time of the "

Next, the operation of the redundancy control circuit having the above-described configuration will be described.

First, in the general fault count control unit 1, the general fault search unit 12, which operates in synchronization with the T1 signal from the timer 11, searches for the occurrence of a general fault, and the search result is latched. ) Is counted by the gate unit 14 in the general fault counter 15 in synchronization with the T3 signal from the timer 11.

On the other hand, the general fault counter 15 is supplied with the AND processing signal of the T4 signal from the timer 11 and the flag signal from the switch flag generation unit 4, so that the general fault counter 15 The general fault is counted only during the time period set by the T4 signal, and when the count value reaches a predetermined value, the switching request flag generating section 4 outputs the switching request signal.

Here, the T4 signal and the special counter clear signal are determined according to the class of the general fault, and the period thereof is preferably changed according to the number of fault occurrences that require switching.

On the other hand, the switch request signal from the general fault counter 15 and the search signal CFLT from the main fault search unit 2 for searching for the main fault are applied to the switch request flag generation unit 4, and the switch The request flag generator 4 generates a switch request flag based on the switch request signal and the search signal CFLT. Then, the switching request flag is applied to the general fault counter 15 through the gate unit 16 to clear the count value, and is applied to the active / standby determination unit 5, and the active / standby determination unit ( 5) determines active / standby based on the switching request flag and the active / fault signal BACT * / BFULT * input from the counterpart redundant control circuit B. FIG.

Therefore, according to the redundancy control circuit of the present invention having the above-described configuration, since the redundancy process is controlled according to the degree of the fault generated, the active / standby switching of the redundancy structure by hardware can be reliably performed.

Claims (3)

A general fault count control unit 1 for counting a general fault and outputting a fault signal according to the timer clock signal, a main fault search unit 2 for searching for a major fault, and a fault occurrence including a general fault and a major fault Fault search unit 3 for generating a fault signal, and a switch request flag generator 4 for generating a switch request flag based on output signals from the general fault count control unit 1 and the main fault search unit 2; And an active / standby determination unit 5 for determining an active / standby state on the basis of the output signal from the switching request flag generating unit 4 and the active / fault signal from the counterpart redundant control unit. Redundancy control circuit of multiple fault generating systems. 2. The general fault count control unit 1 according to claim 1, wherein the general fault count control unit 1 periodically checks T1 for periodically searching for a general fault, T2 for clearing a general fault, T3 for periodically counting a general fault, and a general fault count. A timer 11 for generating a timing signal of T4 for clearing, and a general fault search section 12 for searching for a general fault that does not require immediate active / standby switching according to the T1 signal from the timer 11; A latch unit 13 for latching the general fault from the general fault search unit 12 and clearing the latched general fault in accordance with the T2 signal from the timer 11; The gate part 14 for outputting the latched data to the latch part 13 in accordance with the T3 signal of < RTI ID = 0.0 > and < / RTI > (15) and a gate section 16 for setting the count time of the general fault count 15 based on the T4 signal from the timer 11 and the flag signal from the switch request flag generating section 4; Redundancy control circuit of the multiple fault generation system, characterized in that provided. 3. The redundancy control circuit of claim 2, wherein the period of the T4 signal of the timer (11) is determined according to the level of the general fault.