KR970000959B1 - Contact plug forming method of semiconductor device - Google Patents
Contact plug forming method of semiconductor device Download PDFInfo
- Publication number
- KR970000959B1 KR970000959B1 KR93028113A KR930028113A KR970000959B1 KR 970000959 B1 KR970000959 B1 KR 970000959B1 KR 93028113 A KR93028113 A KR 93028113A KR 930028113 A KR930028113 A KR 930028113A KR 970000959 B1 KR970000959 B1 KR 970000959B1
- Authority
- KR
- South Korea
- Prior art keywords
- contact
- contact hole
- forming method
- semiconductor device
- contact plug
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
A contact forming method using selective metal filled in contact holes is disclosed. The method comprises the steps of: selective etching an interlayer insulator(3) using a photoresist pattern(4) in order to form a contact hole(5); forming a silicon-rich layer(7) at both side walls of the contact hole(5) by implanting 85SiF3+3 having projected range property; and filling the contact hole(5) using selective metal growing method. Thereby, it is possible to improve a step coverage and uniformity of contact topology by preventing an over-filing in the shallow contact hole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93028113A KR970000959B1 (en) | 1993-12-16 | 1993-12-16 | Contact plug forming method of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR93028113A KR970000959B1 (en) | 1993-12-16 | 1993-12-16 | Contact plug forming method of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021151A KR950021151A (en) | 1995-07-26 |
KR970000959B1 true KR970000959B1 (en) | 1997-01-21 |
Family
ID=19371337
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR93028113A KR970000959B1 (en) | 1993-12-16 | 1993-12-16 | Contact plug forming method of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970000959B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020068844A (en) * | 2001-02-23 | 2002-08-28 | 박병국 | Method for forming ultra-fine patterns using sidewalls and selective oxidation |
-
1993
- 1993-12-16 KR KR93028113A patent/KR970000959B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950021151A (en) | 1995-07-26 |
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