KR960043202A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Abstract

The present invention relates to a method for manufacturing a capacitor of a semiconductor device, comprising forming a contact hole exposing a predetermined portion of a semiconductor substrate, depositing a conductive layer connected to the predetermined portion, and then forming an insulating layer pattern on the conductive layer. After forming the insulating film spacer on the sidewall of the insulating film pattern, the insulating film is removed and the conductive layer is etched to a certain depth by using the insulating film spacer as a mask to form a groove, and the insulating film stager is removed. By forming electrodes, capacitors can be obtained to ensure sufficient capacitance for high integration of semiconductor devices without increasing steps, and capacitors that can secure enough capacitance for high integration of semiconductor devices can be formed to enable high integration of semiconductor devices. And improve the reliability of the semiconductor device In a number of technologies.

Description

Capacitor Manufacturing Method of Semiconductor Device

As this is a public information case, the full text was not included.

1A to 1I are sectional views showing a capacitor forming process of a semiconductor device according to a first embodiment of the present invention, and FIG. 2A is a sectional view showing a capacitor forming process of a semiconductor device according to a second embodiment of the present invention.

Claims (24)

Forming a contact hole exposing a predetermined portion of the semiconductor substrate through a lower insulating layer formed on the semiconductor substrate; forming a first conductive layer connected to the predetermined portion through the contact hole; Sequentially forming a first insulating film, a second conductive layer, and a second insulating film on the first conductive layer in a predetermined thickness, forming a photosensitive film pattern on the second insulating film, and using the photosensitive film pattern as a mask. 2) etching the insulating film, removing the photoresist pattern, forming a third insulating film spacer on the etching surface of the second insulating film, removing the second insulating film, and removing the third insulating film spacer Forming a second conductive layer pattern by etching the second conductive layer using a mask as a mask, and forming a fourth insulating layer spacer on sidewalls of the third insulating layer spacer. Removing the second conductive layer pattern by a wet method; forming a first insulating layer pattern by etching the first insulating layer using the fourth insulating layer spacer as a mask; and removing the fourth insulating layer spacer. Forming a fifth insulating film spacer on the sidewalls of the first insulating film pattern, removing the first insulating film pattern, and etching the first conductive layer to a predetermined thickness using the fifth insulating film spacer as a mask. Etching the first conductive layer in which the groove is formed by forming a groove, removing the fifth insulating layer spacer, etching using a storage electrode mask, and a dielectric film and a plate electrode on the entire surface. Capacitor manufacturing method of a semiconductor device comprising the step of sequentially forming. The method of claim 1, wherein the first and second conductive layers are formed of a polysilicon film. The method of claim 1, wherein the first and second insulating layers are formed of a nitride film. The method of claim 1, wherein the first insulating layer is formed to a thickness of 300 to 3000 Å. The method of claim 1, wherein the second conductive layer is formed to a thickness of 300 to 3000 Å. The method of claim 1, wherein the second insulating layer is formed to a thickness of 300 to 3000 Å. The method of claim 1, wherein the photoresist pattern is formed by an etching process using a storage electrode mask. The method of claim 1, wherein the third, fourth and fifth insulating films are formed of an oxide film. The method of claim 1, wherein the third insulating layer spacer is formed to have a width of 100 to 2000 kHz. The method of claim 1, wherein the second insulating layer is a wet method using a phosphoric acid solution. The method of claim 1, wherein the third insulating layer spacer is a wet method using a difference in etching selectivity between the second conductive layer and the first insulating layer. The method of claim 1, wherein the fourth insulating layer spacer is formed to have a width of about 100 to about 2000 microseconds. The method of claim 1, wherein the first insulating layer etching process is performed by a dry method using the first conductive layer as an etching barrier. The method of claim 1, wherein the fourth insulating layer spacer is formed by a wet method using a difference in etching selectivity between the first insulating layer pattern and the first conductive layer. The method of claim 1, wherein the fifth insulating layer spacer is formed to have a width of about 100 to about 2000 microseconds. The method of claim 1, wherein the first insulating layer pattern is removed with a phosphoric acid solution. The method of claim 1, wherein the groove is formed to a depth of 3/10 to 9/10 of the total thickness of the first conductive layer. Forming a lower insulating layer on the semiconductor substrate, forming a contact hole exposing a predetermined portion of the semiconductor substrate through the lower insulating layer, and a conductive layer connected to the predetermined portion through the contact hole. Forming a first insulating film on the conductive layer; forming a photoresist pattern on the first insulating film; and etching the first insulating film by using the photoresist pattern as a mask. Forming an insulating film pattern, removing the photoresist pattern, forming a second insulating film spacer on the sidewalls of the first insulating film pattern, removing the first insulating film pattern, and removing the second insulating film spacer. Forming a groove by etching the conductive layer to a predetermined depth using a mask as a mask, and removing the second insulating film spacer by a wet method. And a step of sequentially forming a dielectric film and a plate electrode on the entire surface thereof. 19. The method of claim 18, wherein the conductive layer is formed of polycrystalline silicon. 19. The method of claim 18, wherein the first insulating film is formed of a nitride film. The method of claim 18. The photoresist pattern is a capacitor manufacturing method of a semiconductor device, characterized in that formed by an etching process using a storage electrode mask. 19. The method of claim 18, wherein the second insulating film is formed of an oxide film. 19. The method of claim 18, wherein the first insulating film pattern is removed by a wet method using a phosphoric acid solution. 19. The method of claim 18, wherein the groove is formed to a depth of 3/10 to 9/10 of the total thickness of the conductive layer. ※ Note: The disclosure is based on the initial application.